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Mon, 06 Jan 2025 17:18:45 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 1CB4340048; Mon, 6 Jan 2025 17:17:11 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E864E28EFA9; Mon, 6 Jan 2025 17:16:10 +0100 (CET) Received: from [10.252.22.94] (10.252.22.94) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Mon, 6 Jan 2025 17:16:09 +0100 Message-ID: <85acb818-43db-4d4e-aef2-33a2ce25a45b@foss.st.com> Date: Mon, 6 Jan 2025 17:16:08 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] drm/modes: introduce drm_mode_validate_mode() helper function To: Sean Nyekjaer , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Yannick Fertre , Philippe Cornu , Maxime Coquelin , Alexandre Torgue CC: , , , , References: <20241125-dsi-relax-v2-0-9113419f4a40@geanix.com> <20241125-dsi-relax-v2-1-9113419f4a40@geanix.com> Content-Language: en-US From: Raphael Gallais-Pou In-Reply-To: <20241125-dsi-relax-v2-1-9113419f4a40@geanix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 On 11/25/24 14:49, Sean Nyekjaer wrote: > Check if the required pixel clock is in within .5% range of the > desired pixel clock. > This will match the requirement for HDMI where a .5% tolerance is allowed. > > Signed-off-by: Sean Nyekjaer > --- > drivers/gpu/drm/drm_modes.c | 34 ++++++++++++++++++++++++++++++++++ > include/drm/drm_modes.h | 2 ++ > 2 files changed, 36 insertions(+) > > diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c > index 6ba167a3346134072d100af0adbbe9b49e970769..4068b904759bf80502efde6e4d977b297f5d5359 100644 > --- a/drivers/gpu/drm/drm_modes.c > +++ b/drivers/gpu/drm/drm_modes.c > @@ -1623,6 +1623,40 @@ bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, > } > EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo); > > +/** > + * drm_mode_validate_mode > + * @mode: mode to check > + * @rounded_rate: output pixel clock > + * > + * VESA DMT defines a tolerance of 0.5% on the pixel clock, while the > + * CVT spec reuses that tolerance in its examples, so it looks to be a > + * good default tolerance for the EDID-based modes. Define it to 5 per > + * mille to avoid floating point operations. > + * > + * Returns: > + * The mode status > + */ > +enum drm_mode_status drm_mode_validate_mode(const struct drm_display_mode *mode, > + unsigned long long rounded_rate) > +{ > + enum drm_mode_status status; > + unsigned long long rate = mode->clock * 1000; > + unsigned long long lowest, highest; > + > + lowest = rate * (1000 - 5); > + do_div(lowest, 1000); > + if (rounded_rate < lowest) > + return MODE_CLOCK_LOW; > + > + highest = rate * (1000 + 5); > + do_div(highest, 1000); > + if (rounded_rate > highest) > + return MODE_CLOCK_HIGH; > + > + return MODE_OK; > +} > +EXPORT_SYMBOL(drm_mode_validate_mode); Hi, With an agreement reached by everyone on the name of this function: Reviewed-by: Raphael Gallais-Pou Regards, Raphaël > + > static enum drm_mode_status > drm_mode_validate_basic(const struct drm_display_mode *mode) > { > diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h > index b9bb92e4b0295a5cbe0eb0da13e77449ff04f51d..4b638992f3e50d2aba5088644744457d72dbe10a 100644 > --- a/include/drm/drm_modes.h > +++ b/include/drm/drm_modes.h > @@ -549,6 +549,8 @@ bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, > const struct drm_display_mode *mode2); > bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, > const struct drm_display_mode *mode2); > +enum drm_mode_status drm_mode_validate_mode(const struct drm_display_mode *mode, > + unsigned long long rounded_rate); > > /* for use by the crtc helper probe functions */ > enum drm_mode_status drm_mode_validate_driver(struct drm_device *dev, >