From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 06D3135280; Mon, 22 Jul 2024 08:37:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721637455; cv=none; b=upi6Wc/+5XwsezKW7cX1GoWpl7t+ePcN9ByOb0WsJj14k7KTToPAeFYvF11e1SWRmwfDuuSNb+lyxbgfwr1MCXjpD0g2z6XN4MWGf4sklKKP5BNsqJmCY4t0V43c76KrcQ8IZeJX9Lwpr/P3O5RfmitDaBVV9RJF9fAA/eXZrNI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721637455; c=relaxed/simple; bh=2EEZaUkorjmqtX4vo+wsyxSXw+I7qnOqGEyZXTSHmOw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=VUTaQb9ulSjSe1BXk+ni7nT3lLEgZUAt1D36+BWivuw1k059jY3ziPox/JCUIW4jYq2BCBIVCpBIG3gH0GHguPt7wMrEWGijY98IWjFsBEZhoFwfF4GzClSVAM6fYgeC/8Tb8u0CKmOeukJ9yGboaRsMEtajJjVvdHM0TO8MXdU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C0FAA367; Mon, 22 Jul 2024 01:37:57 -0700 (PDT) Received: from [10.162.41.8] (a077893.blr.arm.com [10.162.41.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A5E803F73F; Mon, 22 Jul 2024 01:37:28 -0700 (PDT) Message-ID: <85b781d6-c3b0-49d8-8839-33d606724d02@arm.com> Date: Mon, 22 Jul 2024 14:07:24 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64/sysreg: Correct the values for GICv4.1 To: Zenghui Yu , Raghavendra Rao Ananta Cc: Oliver Upton , Marc Zyngier , Catalin Marinas , Will Deacon , Mark Brown , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org References: <20240718215532.616447-1-rananta@google.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 7/21/24 14:59, Zenghui Yu wrote: > On 2024/7/19 5:55, Raghavendra Rao Ananta wrote: >> Currently, sysreg has value as 0b0010 for the presence of GICv4.1 in >> ID_PFR1_EL1 and ID_AA64PFR0_EL1, instead of 0b0011 as per ARM ARM. >> Hence, correct them to reflect ARM ARM. >> >> Signed-off-by: Raghavendra Rao Ananta >> --- >>  arch/arm64/tools/sysreg | 4 ++-- >>  1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg >> index a4c1dd4741a47..7ceaa1e0b4bc2 100644 >> --- a/arch/arm64/tools/sysreg >> +++ b/arch/arm64/tools/sysreg >> @@ -149,7 +149,7 @@ Res0    63:32 >>  UnsignedEnum    31:28    GIC >>      0b0000    NI >>      0b0001    GICv3 >> -    0b0010    GICv4p1 >> +    0b0011    GICv4p1 >>  EndEnum >>  UnsignedEnum    27:24    Virt_frac >>      0b0000    NI >> @@ -903,7 +903,7 @@ EndEnum >>  UnsignedEnum    27:24    GIC >>      0b0000    NI >>      0b0001    IMP >> -    0b0010    V4P1 >> +    0b0011    V4P1 >>  EndEnum >>  SignedEnum    23:20    AdvSIMD >>      0b0000    IMP > > Fortunately there is no user for this bit inside kernel. We had checked > against the correct hard-coded value (0x3) in gic_cpuif_has_vsgi(). which probably helped this problem to be left unnoticed till now :) but I guess it would be better to use ID_AA64PFR0_EL1_GIC_V4P1 there instead. > > Reviewed-by: Zenghui Yu >