From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 111AFC433EF for ; Tue, 22 Mar 2022 00:49:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234487AbiCVAua (ORCPT ); Mon, 21 Mar 2022 20:50:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234456AbiCVAu3 (ORCPT ); Mon, 21 Mar 2022 20:50:29 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E01B02F3BD for ; Mon, 21 Mar 2022 17:49:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647910142; x=1679446142; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=0x7qIpjv0NuBVYWXT9Tw0mEj9Ru1y7+aMXqGBkCgSwc=; b=Ag6g7MDhLCmplK7Jes7zPXCvDBAbApNYYb0bLlwdlfSgxEWX1jE8c+ai p3a7q7IlHshEviy3dZhbQQ0hL2m8VT18hUgWcrsN3LiLfVXup844sufP6 UvuobO4C1e+fIMWhgFUPO9wvqRN6hE5rCWgcHiDgiGrgrvNqAbxRGwnSB eD2sVePyJg7XeRSURHh1RdgSsmFOUQMSVwF70z9y/m/qp40y0fz/beIxG vmazL9lc1/bI4koQWNTyUkpb2CfDyrmw+dqLJvhb8snm07EGvAFwjzrXi qzz69Uc+GnFKeTS1Zu5fyaABgeFFBVFQ0Qc5APZo89HHC6wTBXTnSLsPs Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10293"; a="282517335" X-IronPort-AV: E=Sophos;i="5.90,200,1643702400"; d="scan'208";a="282517335" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 17:49:02 -0700 X-IronPort-AV: E=Sophos;i="5.90,200,1643702400"; d="scan'208";a="560120071" Received: from blu2-mobl3.ccr.corp.intel.com (HELO [10.254.208.85]) ([10.254.208.85]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 17:48:59 -0700 Message-ID: <85d61ad6-0cf0-ac65-3312-32d0cdeb1b27@linux.intel.com> Date: Tue, 22 Mar 2022 08:48:57 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Cc: baolu.lu@linux.intel.com, Eric Auger , "Liu, Yi L" , "Pan, Jacob jun" , "iommu@lists.linux-foundation.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH RFC 01/11] iommu: Add pasid_bits field in struct dev_iommu Content-Language: en-US To: "Tian, Kevin" , Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , "Raj, Ashok" , Will Deacon , Robin Murphy , Jean-Philippe Brucker References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> <20220320064030.2936936-2-baolu.lu@linux.intel.com> <7de05f5e-864f-175e-5604-29561d330884@linux.intel.com> From: Lu Baolu In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/3/22 8:26, Tian, Kevin wrote: >> From: Lu Baolu >> Sent: Monday, March 21, 2022 6:22 PM >>>> - if (features >= 0) >>>> + if (features >= 0) { >>>> info->pasid_supported = features | 1; >>>> + dev->iommu->pasid_bits = >>>> + fls(pci_max_pasids(pdev)) - 1; >>> Original intel_svm_alloc_pasid() covers both PCI and non-PCI devices: >>> >>> ioasid_t max_pasid = dev_is_pci(dev) ? >>> pci_max_pasids(to_pci_dev(dev)) : intel_pasid_max_id; >>> >>> though I'm not sure whether non-PCI SVA has been supported indeed, this >>> patch implies a functional change here. >>> >> >> The info->pasid_supported is only set for PCI devices. So the status is >> that non-PCI SVA hasn't been supported. No functional change here from >> this point of view. >> > > Then this information should be included in the commit msg. Sure. Best regards, baolu