From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE829C197A0 for ; Mon, 20 Nov 2023 11:29:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232789AbjKTL3i (ORCPT ); Mon, 20 Nov 2023 06:29:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232627AbjKTL3g (ORCPT ); Mon, 20 Nov 2023 06:29:36 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18D3990; Mon, 20 Nov 2023 03:29:31 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3AKBTEYE128584; Mon, 20 Nov 2023 05:29:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1700479754; bh=BLEDsm/tYWfhwzYZpH4LZ43y0iT2tVYZ/aiTuDK+wDw=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=FwVSnWBPoUq1E/t7aTdM1MsoYVnr+l73iEzilaZEK+KYW+Rzz0KSfYjDa8/Cfrc66 6r8THDO5ztYsgm5M2ob3d8asWQ3ydvfMZOrj1CcbpZakIW05jm3kddubmdoufE9cx/ mWDqzTop+eTBiDs1oyfx5QgK1MYGsvMu9zPwZ+4w= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3AKBTELw013637 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 20 Nov 2023 05:29:14 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 20 Nov 2023 05:29:14 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 20 Nov 2023 05:29:14 -0600 Received: from [10.24.69.31] (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AKBSIm7122511; Mon, 20 Nov 2023 05:29:11 -0600 Message-ID: <85ec4b6e-e3eb-4a19-aec4-82865a940cbf@ti.com> Date: Mon, 20 Nov 2023 16:59:10 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: ti: k3-am654-icssg2: Enable PHY interrupts for ICSSG2 Content-Language: en-US To: Siddharth Vadapalli , , , , , , CC: , , , , References: <20231120063159.539306-1-s-vadapalli@ti.com> From: MD Danish Anwar In-Reply-To: <20231120063159.539306-1-s-vadapalli@ti.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20/11/23 12:01 pm, Siddharth Vadapalli wrote: > Enable interrupt mode of operation of the DP83867 Ethernet PHY which is > used by ICSSG2. The DP83867 PHY driver already supports interrupt handling > for interrupts generated by the PHY. Thus, add the necessary device-tree > support to enable it. > > Since the GPIO1_87 line is muxed with EXT_REFCLK1 and SYNC1_OUT, update > the pinmux to select GPIO1_87 for routing the interrupt. > > Signed-off-by: Siddharth Vadapalli Reviewed-by: MD Danish Anwar > --- > > This patch is based on linux-next tagged next-20231120. > > Regards, > Siddharth. > > arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso | 17 +++++++++++++++-- > 1 file changed, 15 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso > index ec8cf20ca3ac..9f723592d0f4 100644 > --- a/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso > +++ b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso > @@ -124,21 +124,34 @@ AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */ > }; > }; > > +&main_pmx1 { > + /* Select GPIO1_87 for ICSSG2 PHY interrupt */ > + icssg2_phy_irq_pins_default: icssg2-phy-irq-default-pins { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0014, PIN_INPUT, 7) /* (A22) EXT_REFCLK1.GPIO1_87 */ > + >; > + }; > +}; > + > &icssg2_mdio { > status = "okay"; > - pinctrl-names = "default"; > - pinctrl-0 = <&icssg2_mdio_pins_default>; > + pinctrl-names = "default", "icssg2-phy-irq"; > + pinctrl-0 = <&icssg2_mdio_pins_default>, <&icssg2_phy_irq_pins_default>; > #address-cells = <1>; > #size-cells = <0>; > > icssg2_phy0: ethernet-phy@0 { > reg = <0>; > + interrupt-parent = <&main_gpio1>; > + interrupts = <87 0x2>; > ti,rx-internal-delay = ; > ti,fifo-depth = ; > }; > > icssg2_phy1: ethernet-phy@3 { > reg = <3>; > + interrupt-parent = <&main_gpio1>; > + interrupts = <87 0x2>; > ti,rx-internal-delay = ; > ti,fifo-depth = ; > }; -- Thanks and Regards, Danish