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Fri, 04 Jul 2025 19:15:18 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 564JFHbA017747 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 4 Jul 2025 19:15:17 GMT Received: from [10.50.43.109] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Fri, 4 Jul 2025 12:15:13 -0700 Message-ID: <85f62a4b-cec8-48a1-a232-7f904371e390@quicinc.com> Date: Sat, 5 Jul 2025 00:45:10 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v3 0/5] Introduce "non-pixel" sub node within iris video node Content-Language: en-US To: Bryan O'Donoghue , Dmitry Baryshkov CC: Konrad Dybcio , Krzysztof Kozlowski , Dikshita Agarwal , "Abhinav Kumar" , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , References: <5ad418d9-8199-43c9-a477-1e3b939c054c@kernel.org> <7b6db4fa-2f73-376d-4eb3-64c1c7e6cda3@quicinc.com> <5qsgbqml367yq6g5vb4lotrzulojqhi5zlwwribze373a63qrn@rxi4kwyt66m2> <4f38058d-a2f1-4ac5-b234-228cfb2e85ff@kernel.org> <1ad2ca1e-1d57-4ad8-a057-ab0d804f1d49@oss.qualcomm.com> <7da769b4-88e9-401f-bb21-0ff123818b9c@kernel.org> <6840d462-8269-4359-a6e5-d154842b62db@oss.qualcomm.com> From: Vikash Garodia In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=ZKfXmW7b c=1 sm=1 tr=0 ts=68682846 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=P-IC7800AAAA:8 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=DVKtXGnjxsSMy4abO9MA:9 a=QEXdDO2ut3YA:10 a=d3PnA9EDa4IxuAV0gXij:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzA0MDE0NSBTYWx0ZWRfXwmZZKf64Rrvb HEQ8QN4TuRHzs3LDk7rRRHtcesx1zr9Ev1E7nZ8cW9CWdZWuQwvy4MmCE//+VCsKYtUiAW11kar fW0kVDD1j7HoVCsKbm6DHt0XTv8m7GrLAOeoNW05q2pdMkrssH6froKR2UrBaS44Y2TXt+Evopu 9LkaYCmJXxYIWP/WAqowesDCWf5btkG4efqXPU16i3mhX0c0PIPLBJm6a+AarRb9vIZjBYeD9n9 SXludwYOSaMQudTB5epdn3vkUZcu9P91bZnW/H8DWVxr91kJRoMHgYOZWTBgD754MmMLEe6L3Dl dMvYWxEvL/iSsWSR843InbQ6W1qwjTeTshurlDB4zegab0aYTPcndhcXRgorNugv8Y9lNI940oH FpWQt3O/XPduxONPaI4AUHgrqgHTd/He4clRLPvhC4cnZwCa0E7f7YL9wXpfGNyRCbKHgDr8 X-Proofpoint-ORIG-GUID: QjYc8W1nElrbh5xRxxnddHjy0raO8AD8 X-Proofpoint-GUID: QjYc8W1nElrbh5xRxxnddHjy0raO8AD8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-04_06,2025-07-04_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 impostorscore=0 malwarescore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507040145 On 7/4/2025 1:53 PM, Bryan O'Donoghue wrote: > On 03/07/2025 22:23, Dmitry Baryshkov wrote: >>> I still give my RB for the series. >>> >>> To me the only question is should it be applied to sm8550 or to new SoCs >>> from now on, sa8775p, x1e and derivatives. >> I think we need to apply it to_all_ SoCs, maybe starting from MSM8x26 >> and MSM8x16. Likewise, we need to think bout secure buffers usecase. And >> once we do that, we will realize that it also changes the ABI for all >> SoCs that support either Venus or Iris. > > I think a dts change is a non-starter as its an ABI break. > > So if ABI break is out and reworking future dts to allow for a new device is > out, then some API change is needed to allow the driver to stop the kernel > automatically setting up the IOMMUs, create the new device as a platform device > not dependent on DT change and have the probe() of the relevant drivers setup > their own IOMMU extents based on - probably indexes we have in the driver > configuration parameters. The concept of sub device is nothing new, it has been there for firmware iommus on venus bindings [1] and i am just extending it for non-pixel on iris. So instead of complicating the driver, pls relook into the existing solution which looks much simpler. The proposal to dis-associate from DT would certainly bite us in future when we have more and more iommu configurations, lets say "qcom,iommu-vmid" [2], comes in for managing secure stream-ids. [1] https://elixir.bootlin.com/linux/v6.16-rc4/source/Documentation/devicetree/bindings/media/qcom,venus-common.yaml#L50 [2] https://lore.kernel.org/all/20231101071144.16309-2-quic_gkohli@quicinc.com/