From: "Leizhen (ThunderTown)" <thunder.leizhen@huaweicloud.com>
To: Tanmay Jagdale <tanmay@marvell.com>,
will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
nicolinc@nvidia.com, mshavit@google.com,
baolu.lu@linux.intel.com, thunder.leizhen@huawei.com,
set_pte_at@outlook.com, smostafa@google.com
Cc: sgoutham@marvell.com, gcherian@marvell.com, jcm@jonmasters.org,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 1/2] iommu/arm-smmu-v3: Add support for ECMDQ register mode
Date: Sun, 28 Apr 2024 10:19:26 +0800 [thread overview]
Message-ID: <85f8d4df-4e4b-0460-4e34-d38588f18639@huaweicloud.com> (raw)
In-Reply-To: <20240425144152.52352-2-tanmay@marvell.com>
On 2024/4/25 22:41, Tanmay Jagdale wrote:
> +static int arm_smmu_ecmdq_probe(struct arm_smmu_device *smmu)
> +{
> + int ret, cpu;
> + u32 i, nump, numq, gap;
> + u32 reg, shift_increment;
> + u64 offset;
> + void __iomem *cp_regs, *cp_base;
> +
> + /* IDR6 */
> + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR6);
> + nump = 1 << FIELD_GET(IDR6_LOG2NUMP, reg);
> + numq = 1 << FIELD_GET(IDR6_LOG2NUMQ, reg);
> + smmu->nr_ecmdq = nump * numq;
> + gap = ECMDQ_CP_RRESET_SIZE >> FIELD_GET(IDR6_LOG2NUMQ, reg);
> +
> + cp_regs = ioremap(smmu->iobase + ARM_SMMU_ECMDQ_CP_BASE, PAGE_SIZE);
> + if (!cp_regs)
> + return -ENOMEM;
> +
> + for (i = 0; i < nump; i++) {
> + u64 val, pre_addr = 0;
This is my mistake. The 'pre_addr' should be defined out of this 'for' loop. Or, you
can remove all 'pre_addr' related statements, commercially available chips that have
been tested cannot have such errors.
> +
> + val = readq_relaxed(cp_regs + 32 * i);
> + if (!(val & ECMDQ_CP_PRESET)) {
> + iounmap(cp_regs);
> + dev_err(smmu->dev, "ecmdq control page %u is memory mode\n", i);
> + return -EFAULT;
> + }
> +
<---------------------------------------------
> + if (i && ((val & ECMDQ_CP_ADDR) != (pre_addr + ECMDQ_CP_RRESET_SIZE))) { |
> + iounmap(cp_regs); |
> + dev_err(smmu->dev, "ecmdq_cp memory region is not contiguous\n"); |
> + return -EFAULT; |
> + } |
> + |
> + pre_addr = val & ECMDQ_CP_ADDR; |
<-------------------------------------------- feel free remove these
> + }
--
Regards,
Zhen Lei
next prev parent reply other threads:[~2024-04-28 2:19 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-25 14:41 [PATCH V3 0/2] " Tanmay Jagdale
2024-04-25 14:41 ` [PATCH V3 1/2] " Tanmay Jagdale
2024-04-28 2:19 ` Leizhen (ThunderTown) [this message]
2024-04-25 14:41 ` [PATCH V3 2/2] iommu/arm-smmu-v3: Ensure that a set of associated commands are inserted in the same ECMDQ Tanmay Jagdale
2024-04-28 2:08 ` [PATCH V3 0/2] iommu/arm-smmu-v3: Add support for ECMDQ register mode Leizhen (ThunderTown)
2024-04-30 15:09 ` Will Deacon
2024-05-16 14:25 ` Tanmay Jagdale
2024-05-02 16:25 ` Jason Gunthorpe
-- strict thread matches above, loose matches on Subject: below --
2024-04-25 14:30 [PATCH V3 1/2] " Tanmay Jagdale
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