From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mta1.migadu.com (out-236.mta1.migadu.com [95.215.58.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41B6B453A36 for ; Thu, 15 Oct 2026 06:47:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.236 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792046829; cv=none; b=rLzKYGjd+2QwgKMVmlRiNNVmhZ2BJRH5gkTnbSfLDBhLXO/iSJfyZkQ0AvmLS7ORAnOs0YGrW2w+4Bo8cWtV/GslrMdrhpiQEyMZj9LFdvGV854V1iOyzfM1mb+kYqBqwHNN2KK0C/xaVx+odm8ZP8d7KEkY9/Aebguq/s7WQoc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792046829; c=relaxed/simple; bh=t0IiZB/Ux47ttYhnh6RR0lffF1iWD71iJlXsK4k5DOc=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=keiRj7a/vX1AcYSxdcqMbmXFDp26UqKryB4Mn1jdISjzSOx4WpZR1IbVnDra+gsyYThg/SLulldsfmScUHEmcEQgArrbZkIAz3Ed+7Isl8p/lyrCr5b2Ev7TTetybkNRYAx9LGA2xpWBjt6iIIEL7Rqm4AaAmIq8vbHa+aRgbQU= ARC-Authentication-Results:i=1; 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Thu, 15 Oct 2026 06:47:05 +0000 X-Mizu-Trace-ID: c8ba14fd1bd62bdb X-Migadu-Flow: FLOW_OUT Message-ID: <861d25f6-7bcb-4b04-841e-89ed4cf55843@linux.dev> Date: Thu, 15 Oct 2026 14:46:58 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] riscv: dts: sophgo: sg2044: Add eFUSE device To: Inochi Amaoto , Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Yixun Lan , Longbin Li References: <20261014074516.240247-1-inochiama@gmail.com> <20261014074516.240247-4-inochiama@gmail.com> From: Chen Wang In-Reply-To: <20261014074516.240247-4-inochiama@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/14/2026 3:45 PM, Inochi Amaoto wrote: > Add eFUSE controller node for SG2044. > > Signed-off-by: Inochi Amaoto > --- > arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts | 4 ++++ > arch/riscv/boot/dts/sophgo/sg2044.dtsi | 12 ++++++++++++ > drivers/nvmem/sophgo-efuse.c | 1 + > 3 files changed, 17 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts > index fed3d9a384a0..1b506972d465 100644 > --- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts > +++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts > @@ -36,6 +36,10 @@ &emmc { > status = "okay"; > }; > > +&efuse0 { > + status = "okay"; > +}; > + > &gmac0 { > phy-handle = <&phy0>; > phy-mode = "rgmii-id"; > diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi > index 320c4d1d08e6..9577aae08f7f 100644 > --- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi > +++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi > @@ -408,6 +408,18 @@ sd: mmc@703000b000 { > status = "disabled"; > }; > > + efuse0: efuse@7040000000 { > + compatible = "sophgo,sg2044-efuse"; > + reg = <0x70 0x40000000 0x0 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&clk CLK_GATE_EFUSE>, > + <&clk CLK_GATE_APB_EFUSE>; > + clock-names = "core", "apb"; > + resets = <&rst RST_EFUSE0>; > + status = "disabled"; > + }; > + > i2c0: i2c@7040005000 { > compatible = "sophgo,sg2044-i2c", "snps,designware-i2c"; > reg = <0x70 0x40005000 0x0 0x1000>; > diff --git a/drivers/nvmem/sophgo-efuse.c b/drivers/nvmem/sophgo-efuse.c > index 5f90adaf8e4f..568d17b88ff6 100644 > --- a/drivers/nvmem/sophgo-efuse.c > +++ b/drivers/nvmem/sophgo-efuse.c > @@ -14,6 +14,7 @@ > #include > #include > #include > +#include > > #define SG2044_EFUSE_CONTENT_SIZE 0x400 This change is not related to DTS, should it be in patch [2/3]?