From: michaelc <michaelc@turbolinux.com.cn>
To: linux-kernel@vger.kernel.org
Subject: about PENTIUM4 cache line
Date: Fri, 9 Mar 2001 17:03:38 +0800 [thread overview]
Message-ID: <865464921.20010309170338@turbolinux.com.cn> (raw)
Hi,
I read the Intel IA-32 developer's manual recently, and I found
the cache lines for L1 and L2 caches in Pentium4 are 64 bytes
wide, but the thing make me confused is that the default value
CONFIG_X86_L1_CACHE_SHIFT option in 2.4.x kernel is 7, why it's
not 6? Any expanation about this would be appreciated!
--
Best regards,
Michael Chen mailto:michaelc@turbolinux.com.cn
next reply other threads:[~2001-03-09 9:03 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-03-09 9:03 michaelc [this message]
2001-08-08 11:52 ` shutdown on pressing the ATX power button Sergei Haller
2001-08-09 17:56 ` Pavel Machek
2003-08-17 20:25 ` about PENTIUM4 cache line Jamie Lokier
2003-08-17 20:36 ` David B. Stevens
2003-08-17 20:45 ` Dave Jones
2003-08-17 20:58 ` David B. Stevens
2003-08-17 20:42 ` Dave Jones
2003-08-17 22:52 ` Philippe Elie
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