From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F02D9C433DB for ; Tue, 30 Mar 2021 09:24:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A17B86198A for ; Tue, 30 Mar 2021 09:24:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231138AbhC3JY1 (ORCPT ); Tue, 30 Mar 2021 05:24:27 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:15822 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231737AbhC3JYH (ORCPT ); Tue, 30 Mar 2021 05:24:07 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4F8kVF4Ljjz9tHp; Tue, 30 Mar 2021 17:21:57 +0800 (CST) Received: from [10.174.185.179] (10.174.185.179) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.498.0; Tue, 30 Mar 2021 17:23:55 +0800 Subject: Re: [PATCH v14 13/13] iommu/smmuv3: Accept configs with more than one context descriptor To: Eric Auger CC: , , , , , , , , , , , , , , , , , , , , , , , , References: <20210223205634.604221-1-eric.auger@redhat.com> <20210223205634.604221-14-eric.auger@redhat.com> From: Zenghui Yu Message-ID: <86614466-3c74-3a38-5f2e-6ac2f55c309a@huawei.com> Date: Tue, 30 Mar 2021 17:23:54 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <20210223205634.604221-14-eric.auger@redhat.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.185.179] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Eric, On 2021/2/24 4:56, Eric Auger wrote: > In preparation for vSVA, let's accept userspace provided configs > with more than one CD. We check the max CD against the host iommu > capability and also the format (linear versus 2 level). > > Signed-off-by: Eric Auger > Signed-off-by: Shameer Kolothum > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 13 ++++++++----- > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 332d31c0680f..ab74a0289893 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -3038,14 +3038,17 @@ static int arm_smmu_attach_pasid_table(struct iommu_domain *domain, > if (smmu_domain->s1_cfg.set) > goto out; > > - /* > - * we currently support a single CD so s1fmt and s1dss > - * fields are also ignored > - */ > - if (cfg->pasid_bits) > + list_for_each_entry(master, &smmu_domain->devices, domain_head) { > + if (cfg->pasid_bits > master->ssid_bits) > + goto out; > + } > + if (cfg->vendor_data.smmuv3.s1fmt == STRTAB_STE_0_S1FMT_64K_L2 && > + !(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB)) > goto out; > > smmu_domain->s1_cfg.cdcfg.cdtab_dma = cfg->base_ptr; > + smmu_domain->s1_cfg.s1cdmax = cfg->pasid_bits; > + smmu_domain->s1_cfg.s1fmt = cfg->vendor_data.smmuv3.s1fmt; And what about the SIDSS field?