Re: [PATCH v1 1/1] platform/mellanox: mlxbf-pmc: Fix offset calculation for crspace events

[Hans de Goede <hdegoede@redhat.com>]

Hi,

On 1/17/24 11:01, Shravan Kumar Ramani wrote:
> The event selector fields for 2 counters are contained in one
> 32-bit register and the current logic does not account for this.
> 
> Fixes: 423c3361855c ("platform/mellanox: mlxbf-pmc: Add support for BlueField-3")
> Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
> Reviewed-by: David Thompson <davthompson@nvidia.com>
> Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>

Thank you for your patch/series, I've applied this patch
(series) to my review-hans branch:
https://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git/log/?h=review-hans

Note it will show up in the pdx86 review-hans branch once I've
pushed my local branch there, which might take a while.

I will include this patch in my next fixes pull-req to Linus
for the current kernel development cycle.

Regards,

Hans



> ---
>  drivers/platform/mellanox/mlxbf-pmc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c
> index 1dd84c7a79de..b1995ac268d7 100644
> --- a/drivers/platform/mellanox/mlxbf-pmc.c
> +++ b/drivers/platform/mellanox/mlxbf-pmc.c
> @@ -1170,7 +1170,7 @@ static int mlxbf_pmc_program_crspace_counter(int blk_num, uint32_t cnt_num,
>  	int ret;
>  
>  	addr = pmc->block[blk_num].mmio_base +
> -		(rounddown(cnt_num, 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ);
> +		((cnt_num / 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ);
>  	ret = mlxbf_pmc_readl(addr, &word);
>  	if (ret)
>  		return ret;
> @@ -1413,7 +1413,7 @@ static int mlxbf_pmc_read_crspace_event(int blk_num, uint32_t cnt_num,
>  	int ret;
>  
>  	addr = pmc->block[blk_num].mmio_base +
> -		(rounddown(cnt_num, 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ);
> +		((cnt_num / 2) * MLXBF_PMC_CRSPACE_PERFSEL_SZ);
>  	ret = mlxbf_pmc_readl(addr, &word);
>  	if (ret)
>  		return ret;