From: "Yinghai Lu" <yhlu.kernel@gmail.com>
To: "Muli Ben-Yehuda" <muli@il.ibm.com>
Cc: akpm@linux-foundation.org, ak@suse.de, apw@shadowen.org,
clameter@sgi.com, greg@kroah.com,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/5] x86_64: get mp_bus_to_node as early v3
Date: Wed, 8 Aug 2007 01:05:15 -0700 [thread overview]
Message-ID: <86802c440708080105i637f425bhe5c852efa8c3c1a9@mail.gmail.com> (raw)
In-Reply-To: <20070808072351.GK3383@rhun.haifa.ibm.com>
On 8/8/07, Muli Ben-Yehuda <muli@il.ibm.com> wrote:
>
> Can you explain why this patch (and your other patches in this area)
> are needed? is this a performance issue? the patches seem complex, is
> there a good argument for that complexity?
>
1. AMD K8 system with two HT chain: when acpi=off or there is not _PXM
in DSDT, still make numa_node of device get correct value. ...
/sys/devices/pci0000:80/*/numa_node will be correct instead of 0 for
all. ---- so far i didn't find one two chain AMD k8 based system have
_PXM in DSDT...
2. could use dev_to_node instead of pcibus_to_node.
3. complex? I don't think so. It just try to get bus_to_node mapping
from pci conf space and put into one 256 byte array early, and then
use it some link pxm_to_node.
4. make it support quad core opteron by change to scan four regs in NB
func1 intead of func0.
YH
prev parent reply other threads:[~2007-08-08 8:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <200708072245.l77MjVxU008742@imap1.linux-foundation.org>
2007-08-08 1:20 ` Yinghai Lu
2007-08-08 7:23 ` Muli Ben-Yehuda
2007-08-08 8:05 ` Yinghai Lu [this message]
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