From: "Yinghai Lu" <yhlu.kernel@gmail.com>
To: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Ingo Molnar" <mingo@elte.hu>, "Jeff Garzik" <jeff@garzik.org>,
"Ayaz Abdulla" <aabdulla@nvidia.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: regression caused by: genirq: do not leave interupts enabled on free_irq
Date: Fri, 11 Apr 2008 11:22:08 -0700 [thread overview]
Message-ID: <86802c440804111122x5c106779g60f1c04ae21fed94@mail.gmail.com> (raw)
In-Reply-To: <1207899030.15605.1.camel@x61.ebiederm.org>
[-- Attachment #1: Type: text/plain, Size: 1440 bytes --]
On Fri, Apr 11, 2008 at 12:30 AM, Eric W. Biederman
<ebiederm@xmission.com> wrote:
>
>
> On Fri, 2008-04-11 at 00:17 -0700, Yinghai Lu wrote:
> > On Fri, Apr 11, 2008 at 12:14 AM, Yinghai Lu <yhlu.kernel@gmail.com> wrote:
> > > On Fri, Apr 11, 2008 at 12:01 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> > > > On Thu, 10 Apr 2008, Yinghai Lu wrote:
> > > > > last week found:
> > > > > after latest kernel kexec RHEL 5.1 or other stack kernel, the nvidia
> > > > > forcedeth doesn't work anymore.
> > > > >
> > > > > I stared at forcedeth.c two days. and revert every patches about that
> > > > > doesn't help.
> > > >
> > > > So forcedeth does not come up again, when you kexec from linus.git
> > > > into an older distro kernel. Or is it the other way round ?
> > > RHEL 5.1 kexec RHEL 5.1 : works
> > > RHEL 5.1 kexec linus kernel: works
> > > linus (after -rc2) kexec linus tree: works:
> > > linus (after -rc2) kexec RHEL 5.1 : forcedeth will not come up
> > > linus ( before -rc2 include rc2) kexec RHEL 5.1 works
> > >
> > the forcedeth can not get IP address...
>
> Sounds like you are not getting any interrupts when you receive a
> packet. (i.e. The interrupt line is staying disabled).
>
> Is MSI an option here? I'm wondering if we disable the MSI and
> something is not enabling it.
after
setpci -s 0x00:08.0 0x60.b=0xfe
the eth0 can get ip address with ifup eth0.
YH
[-- Attachment #2: not_works.txt --]
[-- Type: text/plain, Size: 1896 bytes --]
00:08.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a3)
Subsystem: nVidia Corporation Unknown device cb84
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0 (250ns min, 5000ns max)
Interrupt: pin A routed to IRQ 233
Region 0: Memory at defba000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at 8400 [size=8]
Region 2: Memory at defbe800 (32-bit, non-prefetchable) [size=256]
Region 3: Memory at defbe400 (32-bit, non-prefetchable) [size=16]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable+ DSel=0 DScale=0 PME-
Capabilities: [70] MSI-X: Enable- Mask- TabSize=8
Vector table: BAR=2 offset=00000000
PBA: BAR=3 offset=00000000
Capabilities: [50] Message Signalled Interrupts: 64bit+ Queue=0/3 Enable-
Address: 00000000fee04000 Data: 406a
Capabilities: [6c] HyperTransport: MSI Mapping
00: de 10 73 03 07 00 b0 00 a3 00 80 06 00 00 00 00
10: 00 a0 fb de 01 84 00 00 00 e8 fb de 00 e4 fb de
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 84 cb
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 01 14
40: de 10 84 cb 01 70 02 fe 00 01 00 00 0c 00 00 00
50: 05 6c 86 01 00 40 e0 fe 00 00 00 00 6a 40 00 00
60: ff 00 00 00 00 00 00 00 ff 00 00 00 08 00 03 a8
70: 11 50 07 00 02 00 00 00 03 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 11 00 00 00 52 01 00 00 00 00 00 00
[-- Attachment #3: works.txt --]
[-- Type: text/plain, Size: 1896 bytes --]
00:08.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a3)
Subsystem: nVidia Corporation Unknown device cb84
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0 (250ns min, 5000ns max)
Interrupt: pin A routed to IRQ 106
Region 0: Memory at defba000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at 8400 [size=8]
Region 2: Memory at defbe800 (32-bit, non-prefetchable) [size=256]
Region 3: Memory at defbe400 (32-bit, non-prefetchable) [size=16]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable+ DSel=0 DScale=0 PME-
Capabilities: [70] MSI-X: Enable- Mask- TabSize=8
Vector table: BAR=2 offset=00000000
PBA: BAR=3 offset=00000000
Capabilities: [50] Message Signalled Interrupts: 64bit+ Queue=0/3 Enable+
Address: 00000000fee07000 Data: 406a
Capabilities: [6c] HyperTransport: MSI Mapping
00: de 10 73 03 07 00 b0 00 a3 00 80 06 00 00 00 00
10: 00 a0 fb de 01 84 00 00 00 e8 fb de 00 e4 fb de
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 84 cb
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 01 14
40: de 10 84 cb 01 70 02 fe 00 01 00 00 0c 00 00 00
50: 05 6c 87 01 00 70 e0 fe 00 00 00 00 6a 40 00 00
60: fe 00 00 00 00 00 00 00 ff 00 00 00 08 00 03 a8
70: 11 50 07 00 02 00 00 00 03 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 11 00 00 00 52 01 00 00 00 00 00 00
next prev parent reply other threads:[~2008-04-11 18:22 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-04-11 6:13 Yinghai Lu
2008-04-11 7:01 ` Thomas Gleixner
2008-04-11 7:14 ` Yinghai Lu
2008-04-11 7:17 ` Yinghai Lu
2008-04-11 7:30 ` Eric W. Biederman
2008-04-11 8:40 ` Yinghai Lu
2008-04-11 15:59 ` Daniel Barkalow
2008-04-11 10:31 ` Thomas Gleixner
2008-04-11 15:19 ` Rafael J. Wysocki
2008-04-11 16:23 ` Yinghai Lu
2008-04-11 18:22 ` Yinghai Lu [this message]
2008-04-11 19:48 ` Yinghai Lu
2008-04-15 7:44 ` Andrew Morton
2008-04-15 8:03 ` Yinghai Lu
2008-04-15 8:17 ` Ingo Molnar
2008-04-15 8:23 ` Yinghai Lu
2008-04-15 8:06 ` Yinghai Lu
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