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Message-ID: <86802c440808011901w2aa40b25u45f5686b262cc2aa@mail.gmail.com>
Date: Fri, 1 Aug 2008 19:01:24 -0700
From: "Yinghai Lu" <yhlu.kernel@gmail.com>
To: "Eric W. Biederman" <ebiederm@xmission.com>
Subject: Re: [PATCH 00/16] dyn_array and nr_irqs support v2
Cc: "Ingo Molnar" <mingo@elte.hu>, "Thomas Gleixner" <tglx@linutronix.de>,
       hpa <hpa@zytor.com>, "Dhaval Giani" <dhaval@linux.vnet.ibm.com>,
       "Mike Travis" <travis@sgi.com>,
       "Andrew Morton" <akpm@linux-foundation.org>,
       linux-kernel@vger.kernel.org
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>> cpu is going to check that vectors in addition to vectors in IDT?
>
> No. The destination cpu and destination vector number are encoded in
> the MSI message.  Each MSI-X source ``vector'' has a different MSI message.
>
> So on my wish list is to stably encode the MSI interurrpt numbers.  And
> using a sparse irq address space I can.  As it only takes 28 bits to hold
> the complete bus + device + function + msi source [ 0-4095 ]
>

how about ioapic interrupt numbers...? they should stay with same
numbering with gsi?

and how about pci segments : that will need another 4 bits for AMD
systems..aka 16 segments..

you will run out of 32bits...

BTW:
kstat_irqs patch is there.
How are the progress with irq_cfg/irq_desc dyn allocating patch?

YH