From: Yinghai Lu <yinghai@kernel.org>
To: ananth@in.ibm.com
Cc: suresh.b.siddha@intel.com,
Linus Torvalds <torvalds@linux-foundation.org>,
Ingo Molnar <mingo@elte.hu>, lkml <linux-kernel@vger.kernel.org>,
stable@kernel.org
Subject: Re: [PATCH] Make Intel 8-way Xeons boot again
Date: Sat, 9 Jan 2010 22:35:48 -0800 [thread overview]
Message-ID: <86802c441001092235j79092e6fse18b61e3d7b0ac6@mail.gmail.com> (raw)
In-Reply-To: <20100110023015.GA2253@in.ibm.com>
On Sat, Jan 9, 2010 at 6:30 PM, Ananth N Mavinakayanahalli
<ananth@in.ibm.com> wrote:
> On Sat, Jan 09, 2010 at 01:13:39PM -0800, Yinghai Lu wrote:
>> On Sat, Jan 9, 2010 at 2:10 AM, Ananth N Mavinakayanahalli
>> <ananth@in.ibm.com> wrote:
>> > On an 8-way system with Intel Xeon X7350 CPUs, booting 2.6.32 or newer
>> > kernels fails at:
>> >
>> > ...
>> > CPU0: Intel(R) Xeon(R) CPU X7350 @ 2.93GHz stepping 0b
>> > Booting Node 0, Processors #1 #2 #3 #4 #5 #6 #7 Ok.
>> > Brought up 8 CPUs
>> > Total of 8 processors activated (46906.05 BogoMIPS).
>> >
>> > Git bisect showed 2fbd07a5f as the offending commit.
>> >
>> > With the patch below, I am able to boot the latest Linus' git tree on
>> > the machine. If this patch is correct, it needs to get into the stable
>> > tree too.
>> >
>> > Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
>> > ---
>> > Index: linux-2.6/arch/x86/kernel/apic/probe_64.c
>> > ===================================================================
>> > --- linux-2.6.orig/arch/x86/kernel/apic/probe_64.c 2010-01-09 14:54:29.000000000 +0530
>> > +++ linux-2.6/arch/x86/kernel/apic/probe_64.c 2010-01-09 14:57:53.000000000 +0530
>> > @@ -70,7 +70,7 @@
>> > if (apic == &apic_flat) {
>> > switch (boot_cpu_data.x86_vendor) {
>> > case X86_VENDOR_INTEL:
>> > - if (num_processors > 8)
>> > + if (num_processors >= 8)
>> > apic = &apic_physflat;
>> > break;
>> > case X86_VENDOR_AMD:
>>
>> can you send out whole bootlog with apic=debug?
>
> Here it is:
> ACPI: LAPIC (acpi_id[0x00] lapic_id[0x0c] enabled)
> ACPI: LAPIC (acpi_id[0x01] lapic_id[0x10] enabled)
> ACPI: LAPIC (acpi_id[0x02] lapic_id[0x0d] enabled)
> ACPI: LAPIC (acpi_id[0x03] lapic_id[0x11] enabled)
> ACPI: LAPIC (acpi_id[0x04] lapic_id[0x0e] enabled)
> ACPI: LAPIC (acpi_id[0x05] lapic_id[0x12] enabled)
> ACPI: LAPIC (acpi_id[0x06] lapic_id[0x0f] enabled)
> ACPI: LAPIC (acpi_id[0x07] lapic_id[0x13] enabled)
...
> Setting APIC routing to flat
> Getting VERSION: 50014
> Getting VERSION: 50014
> Getting ID: c000000
> Getting ID: f3000000
> Getting LVT0: 700
> Getting LVT1: 400
> enabled ExtINT on CPU#0
> ESR value before enabling vector: 0x00000040 after: 0x00000000
> ENABLING IO-APIC IRQs
> ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> CPU0: Intel(R) Xeon(R) CPU X7350 @ 2.93GHz stepping 0b
...
the BSP's physical apic id is 0x0c instead of 0.
not sure Suresh test that or not.
YH
next prev parent reply other threads:[~2010-01-10 6:35 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-09 10:10 Ananth N Mavinakayanahalli
2010-01-09 18:11 ` Linus Torvalds
2010-01-09 22:51 ` Yinghai Lu
2010-01-11 17:38 ` Suresh Siddha
2010-01-09 21:13 ` Yinghai Lu
2010-01-10 2:30 ` Ananth N Mavinakayanahalli
2010-01-10 6:35 ` Yinghai Lu [this message]
2010-01-10 10:26 ` Ingo Molnar
2010-01-11 4:53 ` [PATCH] Revert 2fbd07a5f so machines with BSPs phsyical apic id != 0 can boot Ananth N Mavinakayanahalli
2010-01-11 21:39 ` Suresh Siddha
2010-01-11 22:55 ` Linus Torvalds
2010-01-11 23:45 ` Suresh Siddha
2010-01-11 23:51 ` Suresh Siddha
2010-01-12 0:46 ` Linus Torvalds
2010-01-12 0:50 ` Linus Torvalds
2010-01-12 2:27 ` Suresh Siddha
2010-01-14 0:03 ` Yuhong Bao
2010-01-11 21:43 ` [PATCH] Make Intel 8-way Xeons boot again Yinghai Lu
2010-01-11 21:53 ` Suresh Siddha
2010-01-12 19:10 ` Yinghai Lu
2010-01-12 20:20 ` Suresh Siddha
2010-01-12 21:02 ` H. Peter Anvin
2010-01-12 21:07 ` Suresh Siddha
2010-01-12 22:46 ` Suresh Siddha
2010-01-13 4:42 ` Ananth N Mavinakayanahalli
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