From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E6F33CF1F0 for ; Tue, 29 Sep 2026 14:28:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790692131; cv=none; b=fsFI7cGa+ksP9146RMQp0gc0zune48DYIVUrwkh3crO6gRnFPQAymTc+IxtHrUbO9asPYmwHEFnMoTQWy1OnwwH1+NkEyIPFCf6DQw2hlzeJV9FzGLtIhrb3cDKo5sHHNneKxnei0XH8evwRGdfe695FoGTELyJLty0kiPlyvNk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790692131; c=relaxed/simple; bh=jcu2GMKtu28GBc+RdTD5vQlHe02uqGPiI12mpG8RfRA=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=EN+3BixbwS3geGGXHey0ZE9ow5l/EBWWCzUzgnjbc1rneLxzBV7WWGKv6AF0wUkIz3dRzn6uwr1mHnlY571QimyWURe2WlzSoQ262FCm7Wd8lDcfkhJFIxzm/yKFxaIBdiM8IIV4jmGvj28yllkpkhPhA9bJPWt44WECb1a8fAA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=efCyom0J; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="efCyom0J" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DDCE61F000FF; Tue, 29 Sep 2026 14:28:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1790692129; bh=Byahgp0kQX7I/ehVnTkd/uLe5fVUYBTYCtW56AvyPKg=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=efCyom0Jr2MJmKeYvLecAFUZO2m24gS6+7i03WYfOagqUA5REjNJlj8ExiaQaZqkD YZaWzx9pseXBxaRG0g5YpUPa57Tiuwh04+vf/rNICusKjpj/iohfFSfF4OqD1Ti4ii wRrFUerKrHSb6AN4Xl4SZo06RFSVjKUF/MKjhXv5LquQRg8Gp0OMeTsB1a27skkqdO W1hM4ul5Bto3TcR9+9n1O612c7RQiYZJqutSTn43XONbI0Bul9H7opppmdTs4IoFXm koiqGDRgckCADJ1GT5GUF9bc6nMMiY3fn3vrJlX7fuT7ahRpYuzLNSmHpC1u8YFMGL pRBRt34fttM5Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1xBYp5-0000000EtP2-3hP2; Tue, 29 Sep 2026 14:28:48 +0000 Date: Tue, 29 Sep 2026 15:28:47 +0100 Message-ID: <868q4k3zds.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Catalin Marinas , Mark Rutland , Thomas Gleixner , Ben Horgan , Daniel Lezcano Subject: Re: [PATCH v3 7/8] clocksource/drivers/arm_arch_timer: Expose a direct accessor for the virtual counter In-Reply-To: References: <20260802165327.385217-1-maz@kernel.org> <20260802165327.385217-8-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, tglx@kernel.org, ben.horgan@arm.com, daniel.lezcano@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 29 Sep 2026 13:55:30 +0100, Will Deacon wrote: > > On Sun, Aug 02, 2026 at 05:53:26PM +0100, Marc Zyngier wrote: > > We allow access to the architected counter via arch_timer_read_counter(). > > However, this accessor can either be the virtual or the physical > > view of the counter, depending on how the kernel has been booted. > > > > At the same time, we have some architectural features (such as WFIT, > > WFET) that rely on the virtual counter, and nothing else. > > > > If implementations were perfect, we'd rely on reading CNTVCT_EL0, > > and be done with it. However, we have a bunch of broken implementations > > in the wild, which rely on preemption being disabled and other > > costly workarounds. > > > > In order to provide decent performance on non-broken HW while still > > supporting the legacy horrors, expose arch_timer_read_vcounter() as > > a new helper that hides this complexity. Obviously, this is simply > > a global alias of arch_counter_get_cntvct(). > > > > Signed-off-by: Marc Zyngier > > --- > > drivers/clocksource/arm_arch_timer.c | 2 ++ > > include/clocksource/arm_arch_timer.h | 1 + > > 2 files changed, 3 insertions(+) > > > > diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c > > index b3b31d4f4815f..9c7501ce57073 100644 > > --- a/drivers/clocksource/arm_arch_timer.c > > +++ b/drivers/clocksource/arm_arch_timer.c > > @@ -128,6 +128,8 @@ static notrace u64 arch_counter_get_cntvct(void) > > return __arch_counter_get_cntvct(); > > } > > > > +u64 arch_timer_read_vcounter(void) __attribute__((alias("arch_counter_get_cntvct"))); > > nit: compiler-attributes.h provides __alias to make this a tiny bit cleaner. > > That said, why did you decide on the alias rather than just having this > as a wrapper function? No idea. Laziness, probably. But I've paged most of this stuff out, and I'm not sure it even serves a purpose, given that we've lived for about a decade with the problem it tries to solve. Consider it an abandoned series. Thanks, M. -- Without deviation from the norm, progress is not possible.