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Wed, 18 Jun 2025 08:45:17 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 55I8j6h3016215 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 Jun 2025 08:45:06 GMT Received: from [10.217.216.168] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 18 Jun 2025 01:45:01 -0700 Message-ID: <86ad5ddb-1a43-45c3-af35-9eb863c66f63@quicinc.com> Date: Wed, 18 Jun 2025 14:14:58 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities Content-Language: en-US To: Krzysztof Kozlowski , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Adrian Hunter CC: , , , , , , , , , , , References: <20250618072818.1667097-1-quic_sartgarg@quicinc.com> <20250618072818.1667097-5-quic_sartgarg@quicinc.com> <5336c00d-3b80-423a-bb52-4e1ec35bc7ed@kernel.org> From: Sarthak Garg In-Reply-To: <5336c00d-3b80-423a-bb52-4e1ec35bc7ed@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjE4MDA3NSBTYWx0ZWRfX5uhfxfurFsX8 D2K/JQbmvUyAG00/zGl94ouSX0vROXSDNE3vjeDJgoMgxVg+fphh7Fq88p6BaKGRqakPMMdStyB qccxnB5pe0Rpz9dvLu6FhGt3xqtrg6ElWrLVxeB0oVUsLi5BR7jinw/44Aql8lJQvHTbw6MuMr6 Zvyezn0mhGE6erTL2dvWU0+FkfnV6YzWFCDDln1JG7CkFb2zWbN0aD12Hg28CDHfY3zkdZJtQFf J56+OU0uD9rycbh1EWds2uvFkYY9fTnmVNljzU25GjBVLlBxNSTrG3v05QT4LdFXMu29urVIv1A GCRStw73F/3rFiNiOULrg0Gp7qO9Oq7cSSYZNzXQpfjm94LxFofoJkp26Dd546yn2OXQxCus4pt 7JBk6BNusSIknlm9jahOqUVKm8LyGBWYBucEcs5dA1AjMJYwltt2EZ8PEvMglds+UlM9Wy5E X-Authority-Analysis: v=2.4 cv=VvEjA/2n c=1 sm=1 tr=0 ts=68527c9d cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=h1owDyanI7SH9Gdp24gA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: iMWtXg2TRElK0lcE9mO5U60Dlh1RCuh1 X-Proofpoint-ORIG-GUID: iMWtXg2TRElK0lcE9mO5U60Dlh1RCuh1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-18_03,2025-06-18_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 lowpriorityscore=0 spamscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 clxscore=1015 bulkscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506180075 On 6/18/2025 1:11 PM, Krzysztof Kozlowski wrote: > On 18/06/2025 09:28, Sarthak Garg wrote: >> Kernel now handles all level shifter limitations related to SD card >> modes. >> As a result, the broken hardware capabilities for SDR104 and SDR50 modes >> can be removed from the device tree. >> Additionally, due to level shifter constraints, set the maximum >> frequency for High Speed (HS) mode to 37.5 MHz using the >> max-sd-hs-frequency property for sm8550. >> >> Signed-off-by: Sarthak Garg >> --- >> arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 +--- >> 1 file changed, 1 insertion(+), 3 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi >> index 82cabf777cd2..2c770c979d39 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi >> @@ -3180,6 +3180,7 @@ sdhc_2: mmc@8804000 { >> iommus = <&apps_smmu 0x540 0>; >> qcom,dll-config = <0x0007642c>; >> qcom,ddr-config = <0x80040868>; >> + max-sd-hs-frequency = <37500000>; > So my previous comments stay... This is SoC thus deducible from compatible. > > Best regards, > Krzysztof " I agree that a DT property for the mmc controller would make sense. Although, this seems limited to SD UHS-I speed modes, so perhaps "max-sd-uhs-frequency" would be a better name for it? Kind regards Uffe " https://patchwork.kernel.org/project/linux-mmc/cover/20250523105745.6210-1-quic_sartgarg@quicinc.com/ This was the comment given on V2 to introduce a generic dt property. Best regards, Sarthak