From: Ethan Zhao <haifeng.zhao@linux.intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: baolu.lu@linux.intel.com, bhelgaas@google.com,
robin.murphy@arm.com, jgg@ziepe.ca, kevin.tian@intel.com,
dwmw2@infradead.org, will@kernel.org, lukas@wunner.de,
yi.l.liu@intel.com, dan.carpenter@linaro.org,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] iommu/vt-d: improve ITE fault handling if device was released
Date: Fri, 1 Mar 2024 09:51:34 +0800 [thread overview]
Message-ID: <86db24b9-5461-4b6b-8858-a7ca2966c957@linux.intel.com> (raw)
In-Reply-To: <20240229210726.GA363458@bhelgaas>
On 3/1/2024 5:07 AM, Bjorn Helgaas wrote:
> On Wed, Feb 28, 2024 at 11:07:24PM -0500, Ethan Zhao wrote:
>> Break the loop to blindly retry the timeout ATS invalidation request
>> after ITE fault hit if device was released or isn't present anymore.
>>
>> This is part of the followup of prior proposed patchset
>>
>> https://do-db2.lkml.org/lkml/2024/2/22/350
> Use lore URL, please.
Sure !
>
>> Fixes: 6ba6c3a4cacf ("VT-d: add device IOTLB invalidation support")
>> Signed-off-by: Ethan Zhao <haifeng.zhao@linux.intel.com>
>> ---
>> drivers/iommu/intel/dmar.c | 25 +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
>> index d14797aabb7a..d01d68205557 100644
>> --- a/drivers/iommu/intel/dmar.c
>> +++ b/drivers/iommu/intel/dmar.c
>> @@ -1273,6 +1273,9 @@ static int qi_check_fault(struct intel_iommu *iommu, int index, int wait_index)
>> {
>> u32 fault;
>> int head, tail;
>> + u64 iqe_err, ite_sid;
>> + struct device *dev = NULL;
>> + struct pci_dev *pdev = NULL;
>> struct q_inval *qi = iommu->qi;
>> int shift = qi_shift(iommu);
>>
>> @@ -1317,6 +1320,13 @@ static int qi_check_fault(struct intel_iommu *iommu, int index, int wait_index)
>> tail = readl(iommu->reg + DMAR_IQT_REG);
>> tail = ((tail >> shift) - 1 + QI_LENGTH) % QI_LENGTH;
>>
>> + /*
>> + * SID field is valid only when the ITE field is Set in FSTS_REG
>> + * see Intel VT-d spec r4.1, section 11.4.9.9
>> + */
>> + iqe_err = dmar_readq(iommu->reg + DMAR_IQER_REG);
>> + ite_sid = DMAR_IQER_REG_ITESID(iqe_err);
>> +
>> writel(DMA_FSTS_ITE, iommu->reg + DMAR_FSTS_REG);
>> pr_info("Invalidation Time-out Error (ITE) cleared\n");
>>
>> @@ -1326,6 +1336,21 @@ static int qi_check_fault(struct intel_iommu *iommu, int index, int wait_index)
>> head = (head - 2 + QI_LENGTH) % QI_LENGTH;
>> } while (head != tail);
>>
>> + /*
>> + * If got ITE, we need to check if the sid of ITE is one of the
>> + * current valid ATS invalidation target devices, if no, or the
>> + * target device isn't presnet, don't try this request anymore.
>> + * 0 value of ite_sid means old VT-d device, no ite_sid value.
>> + */
>> + if (ite_sid) {
>> + dev = device_rbtree_find(iommu, ite_sid);
>> + if (!dev || !dev_is_pci(dev))
>> + return -ETIMEDOUT;
>> + pdev = to_pci_dev(dev);
>> + if (!pci_device_is_present(pdev) &&
>> + ite_sid == pci_dev_id(pci_physfn(pdev)))
>> + return -ETIMEDOUT;
>> + }
>> if (qi->desc_status[wait_index] == QI_ABORT)
>> return -EAGAIN;
>> }
>> --
>> 2.31.1
>>
next prev parent reply other threads:[~2024-03-01 1:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-29 4:07 Ethan Zhao
2024-02-29 4:08 ` Ethan Zhao
2024-02-29 21:07 ` Bjorn Helgaas
2024-03-01 1:51 ` Ethan Zhao [this message]
2024-03-01 7:05 ` Ethan Zhao
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