Re: [PATCH v18 01/23] KVM: arm64: protected VM: Handle set_one_reg CNTVCT_EL0/CNTPCT_EL0

[Marc Zyngier <maz@kernel.org>]

On Tue, 15 Sep 2026 22:20:36 +0100,
Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
> 
> This is how it looks like now, reworked.
> 
> 
> diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
> index 6ac3321f4c575..1c8fac222a643 100644
> --- a/arch/arm64/kvm/arch_timer.c
> +++ b/arch/arm64/kvm/arch_timer.c
> @@ -1110,8 +1110,7 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
>                 timer_context_init(vcpu, i);
> 
>         /* Synchronize offsets across timers of a VM if not already
> provided */
> -       if (!vcpu_is_protected(vcpu) &&
> -           !test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET,
> &vcpu->kvm->arch.flags)) {
> +       if (!test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET,
> &vcpu->kvm->arch.flags)) {
>                 timer_set_offset(vcpu_vtimer(vcpu), kvm_phys_timer_read());
>                 timer_set_offset(vcpu_ptimer(vcpu), 0);
>         }
> @@ -1133,6 +1132,15 @@ void kvm_timer_init_vm(struct kvm *kvm)
>          */
>         for (int i = 0; i < NR_KVM_TIMERS; i++)
>                 kvm->arch.timer_data.ppi[i] = get_vgic_ppi(kvm,
> default_ppi[i]);
> +
> +       /*
> +        * For the protected VMs, fix the counter offset to 0 by marking the
> +        * KVM_ARCH_FLAG_VM_COUNTER_OFFSET. This would also prevent
> userspace
> +        * writes to CNTVCT_ELO & CNTPCT_EL0.
> +        * The user can't set the offset via vm ioctl
> KVM_ARM_SET_COUNTER_OFFSET.
> +        */

This is a bit wordy. Something like:

	Protected VMs don't allow any offset being set from userspace,
	either set via writes to the counters or using the dedicated
	ioctl. Pretend the offset has already been set and rely on the
	default offset being 0.

> +       if (kvm_vm_is_protected(kvm))
> +               set_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &kvm->arch.flags);
>  }
> 
>  void kvm_timer_cpu_up(void)

Otherwise LGTM.

	M.

-- 
Without deviation from the norm, progress is not possible.