From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28EBB72627; Thu, 15 May 2025 13:39:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747316346; cv=none; b=C6iBjajZKbZxgdxgLfN+ZFamRn8bByr3cah90TfuzTxkxUsM/gyJ4TMwyAAGLP1rRDl2BLBvyAyRPuYKDi/Waq4EL7rGMzm8dKHF9vDwvRp65DVhXWE/eKdR6rma9F1qve5zc7idtxvT4OSE8JHBdAY82WaAesTnLSFtWub1T/I= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747316346; c=relaxed/simple; bh=EIOxUVksE3XuviiCBzP8CgS3FaS5wIMBO/GIYyKSBRM=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Yn6OpGkNZDO/nns/CNP2/5pnbAgGeL7W+8ODln5GHRQBusTY318ypUIjov9eQ7uu1vfP3ksHMFWXvw3825C2ibv/R7cSM6qjyCjbRhHMhvCw5nKAwR43uNcmJLQ4dh+ShaDxhKuMtb6BA174p5iYFQDYziwVpcSb/0xNF7l8B3c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cCQWAQk+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cCQWAQk+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 89132C4CEE7; Thu, 15 May 2025 13:39:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747316344; bh=EIOxUVksE3XuviiCBzP8CgS3FaS5wIMBO/GIYyKSBRM=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=cCQWAQk+En/dVTAmz1kHXi3efxDXiX0oYSk119kSLhSXMbi7EM2Yzfi+I68/MURXQ ogf7lbj82DSlyiU/3c7lDwd8w1ecpqs5UNmPUNbyRYDN61HCKcpIcgMmi4NgFxPR/k w1wUzWwjW7SpaQ2/81gElCZTq56OuK5znPQp1WT+wt4l4VV4pyO5D6B32Q/iIOHR5F aABqsVuKPMK5lVmR4KNbzeWobzPTAGNiS53YtEr/Md0zfR3n98kU6JoyWI3bLZHB/O 9ieZQ8jLfqNI2o9p3Lrgv+m1YsrdDsIyPDL8fS6LHOotdvxoQKqcwlupbPssFOn973 jqnP09prJgDdg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uFYne-00FFHo-Eg; Thu, 15 May 2025 14:39:02 +0100 Date: Thu, 15 May 2025 14:39:01 +0100 Message-ID: <86ikm2f0y2.wl-maz@kernel.org> From: Marc Zyngier To: Patrick Delaunay Cc: Alexandre TORGUE , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , , , , Subject: Re: [PATCH 1/2] arm64: dts: st: fix timer used for ticks In-Reply-To: <20250515151238.1.I85271ddb811a7cf73532fec90de7281cb24ce260@changeid> References: <20250515151238.1.I85271ddb811a7cf73532fec90de7281cb24ce260@changeid> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: patrick.delaunay@foss.st.com, alexandre.torgue@foss.st.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 15 May 2025 14:12:39 +0100, Patrick Delaunay wrote: > > Remove always-on on generic ARM timer as the clock source provided by > STGEN is deactivated in low power mode, STOP1 by example. > > Fixes: 5d30d03aaf78 ("arm64: dts: st: introduce stm32mp25 SoCs family") > Signed-off-by: Patrick Delaunay > --- > > arch/arm64/boot/dts/st/stm32mp251.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi > index 8d87865850a7..74c5f85b800f 100644 > --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi > +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi > @@ -150,7 +150,7 @@ timer { > , > , > ; > - always-on; > + arm,no-tick-in-suspend; That's amusing, because these two properties literally describe opposite behaviours (from an optimisation to a HW bug). I'm also pretty sure 99% of the DTs in the tree that have the always-on property are wrong. > }; > > soc@0 { I don't want to sound rude or anything, but the guy you Cc'd on an @arm.com will not reply (and hasn't been replying for almost 6 years). Thanks, M. -- Without deviation from the norm, progress is not possible.