From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1794395702; b=RfxctJPM34IbXntpUjyMKqHjukao1fdiWeA2BDowLO64m+vnr/O+0k5JAktKV9LLbC2i lAIgEs3U2gvLAcQ9+7tTwOKnAc80tZEdQ7LPsiE4pHapKXDNsc18iJU2Zh6UsnkeMy4m3 OxQErm2maDVwfv56yzXyrOVqSEHgVEU41UxXP3RvhuxFfPi6p5rDE8YlEZmywYqh09Mm+ gP9j8kuzRLw7Vs1qg7FtglGH+C9E77xJuROky1f2FCxybrx7nSSocF/RAWnTtgn76Rvkx r4nSu7Qz03uvqKD4RemBt1HaGYuIwjpeZBKqC6nhG1W4k1aGpAi7P622yk8eKCVPKaw== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1794395702; h=Received:DKIM-Signature:Received:Date:Message-ID:From:To:Cc:Subject: In-Reply-To:References:User-Agent:MIME-Version:Content-Type: X-SA-Exim-Connect-IP:X-SA-Exim-Rcpt-To:X-SA-Exim-Mail-From: X-SA-Exim-Scanned; bh=Ee5/U40Wmc87ctgtQ5qWbKs42KkK5ylSG9FBEDvI45s=; b=ssvyHUkqrxEtZfIFu4ZZXHo1mpd5IxxN3kErNKA4AimxVbH+tm74/zP5tHOHcWQ/F8Zk NWhQ2MHaNd3L7W6oPeR2yFmZmnxyzZ6GCmtfrJh8lnWdUwlVKpaCF7pFQdNv30iZQWts2 keQRVZcWovBjphPs9lkiThidcSlnOBQ2gmwTQFUzR0HQYx6eZ/PdcwDUh5BR8YW1viMDd oSztFD7V7SRk9WbWDldIhhKG6Yw5DxMZEZNM3idKyIYtqeoeS9V5Srsp4hS9DmhFNairj I4x42ramcR+ee/h5yKyuPlnMIBxF9+XcGKmCFjxt4aIjVRt1dXE/x7/l9bOwWmnEy8g== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=J4crJRAW; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D113606A32A; Wed, 11 Nov 2026 11:15:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=J4crJRAW Received: by smtp.kernel.org (Postfix) with ESMTPSA id A8F401F00A07; Wed, 11 Nov 2026 11:15:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1794395701; bh=Ee5/U40Wmc87ctgtQ5qWbKs42KkK5ylSG9FBEDvI45s=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=J4crJRAWVbfvpdEzzoxakFYHfrQBJgWnHpCMW2Kdomb2jIV3qrQHMed342gp/F/mX kMsU/wWTaTrJ6WuKKxWc5SdZXQBP1m5RyX4tD33uZ65HkxsaWzycCvcbLQYmpXkOhi hXqFRlwDzuPTHJ069Evgl8jbqESxbodTIp/51sSn/Y1uZu/uvez/sFJdZwFPdCDmoh wHteVqLRMxG6LUS46ETgj+PtY6wmrNjznaLBqL2TM3eaYo8LvgYwN5L/iKG/iEJTwg xNzZJneP4bM3aQChDRAUYW4FwKsSNLpLi4lX/HSQCyigtaju02uLntFoesibkJok8c GHw24TtYWW67Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1xR6I7-0000000EG77-2con; Wed, 11 Nov 2026 11:14:59 +0000 Date: Wed, 11 Nov 2026 11:14:59 +0000 Message-ID: <86mrrf1ux8.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: Oliver Upton , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Steffen Eiden , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Mark Rutland , Vincent Donnefort , Fuad Tabba Subject: Re: [PATCH] KVM: arm64: Sync SCTLR_EL1 before a pVM's CPU_ON reads its endianness In-Reply-To: <20261111082746.1064567-1-fuad.tabba@linux.dev> References: <20261111082746.1064567-1-fuad.tabba@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: fuad.tabba@linux.dev, oupton@kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, joey.gouly@arm.com, seiden@linux.ibm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, vdonnefort@google.com, tabba@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 11 Nov 2026 08:27:46 +0000, Fuad Tabba wrote: > > pKVM handles a protected guest's PSCI CPU_ON at EL2 before the guest's > EL1 sysregs are saved, so kvm_vcpu_is_be() reads a stale SCTLR_EL1. A > guest that changes SCTLR_EL1.EE and calls CPU_ON before its next exit > to the host starts the target vCPU with the old endianness. > > Sync SCTLR_EL1 before the read, as inject_sync64() does. > > Fixes: 9d4ec80be2eb4 ("KVM: arm64: Handle PSCI calls for protected VMs at EL2") > Signed-off-by: Fuad Tabba > --- > > Notes: > inject_sync64() is the only other reader on a protected guest's exit > path of a guest-writable EL1 sysreg's copy, and it syncs that register > first. Saving SCTLR_EL1 before the in-loop exit handlers instead would > put the save on every protected exit for two readers. A non-protected > guest's CPU_ON is handled by the host, after the sysregs are saved. > > arch/arm64/kvm/hyp/nvhe/pkvm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c > index fc0475f0877d1..e421f45383e0d 100644 > --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c > +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c > @@ -1321,6 +1321,9 @@ static bool pvm_psci_vcpu_on(struct pkvm_hyp_vcpu *hyp_vcpu) > goto error; > } > > + /* Sync SCTLR_EL1 for kvm_vcpu_is_be(), as HVCs are handled before sysregs are resync'ed. */ > + __vcpu_assign_sys_reg(&hyp_vcpu->vcpu, SCTLR_EL1, read_sysreg_el1(SYS_SCTLR)); > + > reset_state = &target->vcpu.arch.reset_state; > WRITE_ONCE(reset_state->pc, smccc_get_arg2(&hyp_vcpu->vcpu)); > WRITE_ONCE(reset_state->r0, smccc_get_arg3(&hyp_vcpu->vcpu)); > I think it'd make more sense to have a global primitive that pKVM calls to synchronise whatever affects the control flow of a vcpu (yes, control flow for PSCI_ON is a bit abusive, but hey...). It's a bit more invasive, but at least we have a single spot to deal with this stuff, and it doesn't affect the hot path. Something like the hack below. M. diff --git a/arch/arm64/kvm/hyp/include/nvhe/pkvm.h b/arch/arm64/kvm/hyp/include/nvhe/pkvm.h index 0261b2bc681f7..ef05265626b7c 100644 --- a/arch/arm64/kvm/hyp/include/nvhe/pkvm.h +++ b/arch/arm64/kvm/hyp/include/nvhe/pkvm.h @@ -134,6 +134,7 @@ void kvm_init_pvm_id_regs(struct kvm_vcpu *vcpu); void kvm_reset_pvm_sys_regs(struct kvm_vcpu *vcpu); int kvm_check_pvm_sysreg_table(void); +void pkvm_sync_before_exception(struct kvm_vcpu *vcpu); int pkvm_reset_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu); struct pkvm_hyp_vcpu *pkvm_mpidr_to_hyp_vcpu(struct pkvm_hyp_vm *vm, unsigned long mpidr); #endif /* __ARM64_KVM_NVHE_PKVM_H__ */ diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c index fc0475f0877d1..85da570ae1032 100644 --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c @@ -1321,6 +1321,8 @@ static bool pvm_psci_vcpu_on(struct pkvm_hyp_vcpu *hyp_vcpu) goto error; } + pkvm_sync_before_exception(&hyp_vcpu->vcpu); + reset_state = &target->vcpu.arch.reset_state; WRITE_ONCE(reset_state->pc, smccc_get_arg2(&hyp_vcpu->vcpu)); WRITE_ONCE(reset_state->r0, smccc_get_arg3(&hyp_vcpu->vcpu)); diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c index 32e82653ebf7e..f28a96d0e50de 100644 --- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c +++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c @@ -254,7 +254,7 @@ static u64 pvm_calc_id_reg(const struct kvm_vcpu *vcpu, u32 id) } } -static void inject_sync64(struct kvm_vcpu *vcpu, u64 esr) +void pkvm_sync_before_exception(struct kvm_vcpu *vcpu) { *vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR); *vcpu_cpsr(vcpu) = read_sysreg_el2(SYS_SPSR); @@ -265,6 +265,11 @@ static void inject_sync64(struct kvm_vcpu *vcpu, u64 esr) */ __vcpu_assign_sys_reg(vcpu, VBAR_EL1, read_sysreg_el1(SYS_VBAR)); __vcpu_assign_sys_reg(vcpu, SCTLR_EL1, read_sysreg_el1(SYS_SCTLR)); +} + +static void inject_sync64(struct kvm_vcpu *vcpu, u64 esr) +{ + pkvm_sync_before_exception(vcpu); kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC); -- Without deviation from the norm, progress is not possible.