From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2665757EA; Tue, 8 Apr 2025 16:46:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744130772; cv=none; b=cKCN4of8erIGz+tMQPnBG/Xi9XYYoJYf9Mom8NKHsD0c9TZWFqLB+gBFMRLo6qUAWigrt/Vu8cQJstr+OtGeNKYVYMHeWKt9scAIKIDKkOWP9IsqhSPBLkCQO5DotBJoFFL6JCjx7rNg+h5wBAk1ykRxMb7M3F9/9y+mWOpQBvI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744130772; c=relaxed/simple; bh=y4Hqk7RHiAYWnIB3Uz5J2+6PZDT7++zFv2jNYoLEenY=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=bgFK5HamxVML2sN2wsesj8wJNomkTBpvRZXoR+F706fk76UM+NzfXVejgXVhkQvcFnUahWUmyPqEB5WAJepCpxCpOgL4rckq2uOrhMm2YvrUGVkeOVLYPyH8//xNlAHWbXOCgpftCN1fVipgqqMmq4kbNUAkMTq3kR9GACV+q1Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DUjOR1gP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DUjOR1gP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3B965C4CEE5; Tue, 8 Apr 2025 16:46:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1744130772; bh=y4Hqk7RHiAYWnIB3Uz5J2+6PZDT7++zFv2jNYoLEenY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=DUjOR1gPJl0ApZpB/E3373YoIV46OrU6cPFDDiW/l0F6x+bHvm5eQDURxTLou+4c3 3yTBK/zyqVIhQA2YvV3bS2ZsgR6PgOqVjbwf3YK0KMN525zzQVUogeYmafZ0E20/OS pHy8CEgkFAulpaAgESXJV/jYZL5hLjUnATbmorU6USCxP7EpTyQm8qPndBkUektB1g Hr5dqoxcWuDTH6hFdlKNUm64U96rUn+IQB9CsLK3dtqsL6tFydy79icXhCh1tEokeQ uhJHGXizHmp+7/j/xSdceKL19YXdEqEeYN2E45L3qSEMNxZftRbIffewIB1sIIrXSW LfpV46f0oYjag== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1u2C5R-003YhG-TM; Tue, 08 Apr 2025 17:46:10 +0100 Date: Tue, 08 Apr 2025 17:46:09 +0100 Message-ID: <86r022lhym.wl-maz@kernel.org> From: Marc Zyngier To: Christian Bruel Cc: , , , , , , , , Subject: Re: [PATCH 2/2] arm64: dts: st: Use 128kB size for aliased GIC400 register access In-Reply-To: <20250407084028.2072504-1-christian.bruel@foss.st.com> References: <20250407084028.2072504-1-christian.bruel@foss.st.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: christian.bruel@foss.st.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 07 Apr 2025 09:40:28 +0100, Christian Bruel wrote: > > Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped > to 64kB. The offset is then adjusted in the irq-gic driver. nit: mapped *16 times* over a 64kB region. > > see commit 12e14066f4835 ("irqchip/GIC: Add workaround for aliased GIC400") > > Fixes: 5d30d03aaf785 ("arm64: dts: st: introduce stm32mp25 SoCs family") > Signed-off-by: Christian Bruel > --- > arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi > index 379e290313dc..87110f91e489 100644 > --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi > +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi > @@ -119,9 +119,9 @@ intc: interrupt-controller@4ac00000 { > #interrupt-cells = <3>; > interrupt-controller; > reg = <0x0 0x4ac10000 0x0 0x1000>, > - <0x0 0x4ac20000 0x0 0x2000>, > - <0x0 0x4ac40000 0x0 0x2000>, > - <0x0 0x4ac60000 0x0 0x2000>; > + <0x0 0x4ac20000 0x0 0x20000>, > + <0x0 0x4ac40000 0x0 0x20000>, > + <0x0 0x4ac60000 0x0 0x20000>; > }; > > psci { Suggested-by: Marc Zyngier Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.