From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FAAD3AA9D4; Thu, 10 Sep 2026 11:08:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789038540; cv=none; b=D11usOOMvDjGpjnz0FFza4gmmpnL6zLO69sztGC7d0iqeyqcXuZD5YDzZkkeanxHBI9x5hun8keT6SGDysF6uAgIQTLF2U5hshqopQIqZhQAi/HGJUhujGmBAheIl3nzn+8ydSAfRa4Gxh1gVpaq7df+ruhKIFX//WiPkrbOmpE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789038540; c=relaxed/simple; bh=aqPRz5COknVjzSzNITH80cCpteLfipAsl2cDdoiqDVQ=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=bNZH3JU/+7qQQlmIZDzIdpZrdFHedsvEX68ybXroHJVzCr/52ACOFbuFR1EfI3PwQwffmx8thFV+YVLr2M7ngOandMxtPaxdNtwP1shJv2Zssn2EeDlvK9FI34prlPOzA4riFMf2zNgy5EaOBiPrIAH2WM6A7PnL414Gfk/S870= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YALf3tBp; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YALf3tBp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D4D951F000FF; Thu, 10 Sep 2026 11:08:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1789038537; bh=x7qhrmT6HLun6jsVh88qBFkF1/a9MuNKLp5SlVHYpFk=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=YALf3tBpfCON9TZe2Mv4+aJeq7WfpcvlqYIAyIr77+GrgYUoOGwZngBEBus8T5C63 B38VYlbLw2otsmE6g/m4u8EGZuo+WlevckD2sZ7I9VkHtVFNdUIw5x7BKhES76BpDV 7pBISJQsLlAJ7PUnO2Y6h2atyYCHvN/zNjiS3YVqWzwz7lBGQETAXPVEl0nkOeT8wY w71UIu5e9t1QOeFqkmwpXa6dj2tEjKOIZYwOvrjrjUGuF1mStHcgfcLVj89y9LMBO/ REifa/XXAknlsEJYl6gJbBJ4OLAn/1LRsyZMVX/C6eWOXgS8BIXcxm9qttdiqcBcgx iXlQWxq6OOqZQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1x4ceF-00000007EEC-3kUD; Thu, 10 Sep 2026 11:08:55 +0000 Date: Thu, 10 Sep 2026 12:08:55 +0100 Message-ID: <86se3h748o.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: Oliver Upton , Catalin Marinas , Will Deacon , James Morse , Ben Horgan , Xi Ruoyao , Mark Rutland , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Steffen Eiden , Gavin Shan , Yuan Yao , Fuad Tabba , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] KVM: arm64: Trap guest MPAM accesses whenever MPAM is implemented In-Reply-To: <20260908145651.2828597-1-fuad.tabba@linux.dev> References: <20260908145651.2828597-1-fuad.tabba@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: fuad.tabba@linux.dev, oupton@kernel.org, catalin.marinas@arm.com, will@kernel.org, james.morse@arm.com, ben.horgan@arm.com, xry111@xry111.site, mark.rutland@arm.com, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, seiden@linux.ibm.com, gshan@redhat.com, yaoyuan@linux.alibaba.com, tabba@google.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 08 Sep 2026 15:56:51 +0100, Fuad Tabba wrote: > > finalise_el2_state() clears the EL2 MPAM traps whenever the ID > registers advertise MPAM, while KVM sets them only under ARM64_MPAM, > which also requires MPAMEN. Without EL3 nothing sets that enable, so a > guest reaches the MPAM registers while ID_AA64PFR0_EL1.MPAM reads 0 > for it. > > Gate the traps on the ID registers alone: MPAMEN isn't a term in any > MPAM accessor, so they take effect without it. The cap tests the > sanitised ID fields, which never exceed a CPU's own, so it's set only > where finalise_el2_state already wrote MPAM2_EL2. MPAM3_EL3.TRAPLOWER > is clear there, and arm64.nompam turns the cap off too. > > Fixes: 23b33d1e168c ("arm64: head.S: Initialise MPAM EL2 registers and disable traps") > Reviewed-by: Yuan Yao > Signed-off-by: Fuad Tabba > --- > > Notes: > Changes since v1: > - Commit message only. The code is unchanged, so Yuan Yao's > Reviewed-by is carried. > - Fixes: names the commit that cleared the traps, rather than the > one that added KVM's trapping. > - Says why the sanitised ID fields are the safe gate: the cap is set > only where finalise_el2_state already wrote MPAM2_EL2. > > Not covered, and answered on the v1 thread: a machine whose CPUs > differ on MPAM, raised by Ben and by sashiko. > > v1: https://lore.kernel.org/all/20260903160819.831518-1-fuad.tabba@linux.dev/ > > arch/arm64/include/asm/cpufeature.h | 5 +++++ > arch/arm64/kernel/cpufeature.c | 13 +++++++++++++ > arch/arm64/kvm/hyp/include/hyp/switch.h | 4 ++-- > arch/arm64/tools/cpucaps | 1 + > 4 files changed, 21 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index 7404a6e83a930..8863ae99596bc 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -873,6 +873,11 @@ static __always_inline bool system_supports_mpam_hcr(void) > return alternative_has_cap_unlikely(ARM64_MPAM_HCR); > } > > +static __always_inline bool system_supports_mpam_sysregs(void) > +{ > + return alternative_has_cap_unlikely(ARM64_MPAM_SYSREGS); > +} > + What is the rationale for choosing alternative_has_cap_unlikely() instead of cpus_have_final_cap(), which is more wildly used? M. -- Without deviation from the norm, progress is not possible.