From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.codeaurora.org by pdx-caf-mail.web.codeaurora.org (Dovecot) with LMTP id 1GOvBgXfG1sOYQAAmS7hNA ; Sat, 09 Jun 2018 14:07:01 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0A4C5608B8; Sat, 9 Jun 2018 14:07:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham autolearn_force=no version=3.4.0 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by smtp.codeaurora.org (Postfix) with ESMTP id 7C1C96074D; Sat, 9 Jun 2018 14:07:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7C1C96074D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753357AbeFIOG5 (ORCPT + 25 others); Sat, 9 Jun 2018 10:06:57 -0400 Received: from foss.arm.com ([217.140.101.70]:40928 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753225AbeFIOG4 (ORCPT ); Sat, 9 Jun 2018 10:06:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D59B080D; Sat, 9 Jun 2018 07:06:55 -0700 (PDT) Received: from big-swifty.misterjones.org (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 611823F59D; Sat, 9 Jun 2018 07:06:51 -0700 (PDT) Date: Sat, 09 Jun 2018 15:06:41 +0100 Message-ID: <86sh5w8366.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Jon Masters Cc: , , , Catalin Marinas , Will Deacon , Peter Maydell , Lorenzo Pieralisi , Mark Rutland , Robin Murphy , Ard Biesheuvel , Jon Masters , christoffer.dall@arm.com Subject: Re: [PATCH v2 00/16] arm64: Add SMCCC v1.1 support and CVE-2017-5715 (Spectre variant 2) mitigation In-Reply-To: References: <20180129174559.1866-1-marc.zyngier@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: ARM Ltd MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jon, On Sat, 09 Jun 2018 14:22:27 +0100, Jon Masters wrote: > > Hi Marc, > > On 01/29/2018 12:45 PM, Marc Zyngier wrote: > > > ARM has recently published a SMC Calling Convention (SMCCC) > > specification update[1] that provides an optimised calling convention > > and optional, discoverable support for mitigating CVE-2017-5715. ARM > > Trusted Firmware (ATF) has already gained such an implementation[2]. > > Some questions: > > 1). What's the plan to implement the boot time on/off control for > spectre_v2 mitigations? None so far. It can only be disabled at compile time. > 2). What's the plan to handle live migration of VMs? [I assume that by "migration of VMs, you actually mean migration of the mitigation state] As I mentioned in response to your comment on the variant-4 series, this is a work in progress, and is mentioned in the cover letter of that series. Hopefully I'll find time to work on it next week. M. -- Jazz is not dead, it just smell funny.