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Mon, 2 Nov 2026 09:14:22 +0100 Message-ID: <872a93b8-4bd9-4718-89e2-019fd3c5b8ac@foss.st.com> Date: Mon, 2 Nov 2026 09:14:21 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Thomas BOURGOIN Subject: Re: [PATCH net v5 2/2] net: stmmac: restore RX descriptor buffer addresses on resume To: Ding Hui , Maxime Chevallier , Andrew Lunn , "David S. Miller" , Eric Dumazet , "Jakub Kicinski" , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , "open list:STMMAC ETHERNET DRIVER" , "moderated list:ARM/STM32 ARCHITECTURE" , "moderated list:ARM/STM32 ARCHITECTURE" , open list CC: , , , , , References: <20261025100636.613670-1-dinghui1111@163.com> <20261025100636.613670-3-dinghui1111@163.com> Content-Language: en-US In-Reply-To: <20261025100636.613670-3-dinghui1111@163.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: ENXCAS1NODE2.st.com (10.75.128.138) To STKDAG1NODE1.st.com (10.75.128.132) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZR1PEPF0000E6BC:EE_|MRWPR10MB9601:EE_ X-MS-Office365-Filtering-Correlation-Id: 9ee9df39-5049-48a3-80c9-08df38b94dd8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|82310400026|1800799024|23010399003|10067099003|22082099003|18002099003|13003099007|921020|56012099006|4143699003|5023799004|11063799006|261021121427099003|261026140227099003|261022113327099003|261022105027099003|261026121527099003|261022075727099003|261009223027099003|261028144727099003; X-Microsoft-Antispam-Message-Info: 7UHp7LZGBq6qUNAeA2Pe2y7Lf9CSFlPMGcq9f0eoJIdAwHb0orrda3lTeYYlEgVyBjG/nbDbWnFOrzJd6XB2JagNC4FfqNitexKu+QFo9Tie++gF3ht44eF1w0dYP9HvJcnk6M2whiA/0VwBJZQN/5jLJQzpZjNszy28rHfMhbkm3warXC1RpGuKK14Ite+BnYEPLtofw/rXGDhsMOdKx9+13pZZB76ubX2El99+sb5G2Fqq251UJMLrm0pcuAikPsmHMuRF0LsMJMQ/DI3FPXQl70RT0ZeOQAE2D89ZhhXtXJjDrSAWcTo6vx7dYHDIO38vvmtBzolS424BfVkZkp4DLtu6e+QGxuFcrZqsWfhzxEVhzsDAl49XZPD0XiaioTocPhE+6UwpBRhXiHm8mOGzV9h8kqTuzltlMYnGB5u4go8tfm7DB1Ev02m6ZXWk35fRq+RcDPEL9ZmCZfv1pLCOflZ4vN1edrJdr+FHmkUWKeiW0SL8KInG4l7UgZPY5ESgLHr5/PVv3eEX00QGcPCb+CecRK3igxBYTxV7N8xa8zDU8r8Y7hEHpiHrji9PaI7xuCqsVNXmkqIvmpl+iQ5YdZOdyiv6dBQNoaeNNx4iDSZYHU2JrRIqziPAEXPsFwA/slKKdcyYH/iJFm1rPFkYVl1HvrNXCWrR6k/quCR6ALPwJCIL+Lnd7qTxwtDQ X-Forefront-Antispam-Report: CIP:164.130.1.60;CTRY:IT;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:smtpO365.st.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(376014)(7416014)(82310400026)(1800799024)(23010399003)(10067099003)(22082099003)(18002099003)(13003099007)(921020)(56012099006)(4143699003)(5023799004)(11063799006)(261021121427099003)(261026140227099003)(261022113327099003)(261022105027099003)(261026121527099003)(261022075727099003)(261009223027099003)(261028144727099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: WXmarFeqkR0p1nxpMf+d7qJ7v/zCX3Ipcy4Pfv2DFFT/m/7wwKtm3GJHsP4OIgtwSX46WHm9Bcc6qGzN7CWhH8LE85ffEGkjwjk+4BsNUmZo0TyvHTfXXNEdHMVljcb3iwrVCG6pkFVY6Y/pofhyNN+9p9qJEBWnL8+4E5lcInyx7COi7v9GkiibwYONMxSL9oj4g0PTWGZd+NGPf/CjjCZjqStG3SKcdxSmOe+qQDN7+AdjDQDKvlepBsIgvDZ17F9kBBYHaA34fopRk7mNm1vRVXROHL0wCF66T4NuEm7pAc/Kq6r68hZ4gyYLb0+7Y9FrjWvg3G/XZabpj8uZc5wlLu+PXIyph8djy8Nd0lry+wepfryaodMxW4KvVcOQbg+ztVkHI7C029lBnVm2rTN4Ad1dkPPcxkr/gc4r7EfGLhhbHrg/hdRGtO5PQGsf X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Nov 2026 08:14:23.5719 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9ee9df39-5049-48a3-80c9-08df38b94dd8 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.60];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: ZR1PEPF0000E6BC.eurprd07.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MRWPR10MB9601 Hello, I reproduced this issue on the STM32MP215-DK. I’m using kernel v6.18. I fixed it similarly to your v5 patch set (cf. https://lore.kernel.org/all/20261027150556.51209-2-thomas.bourgoin@foss.st.com/). I am limited to testing the low-power sequence on the STM32MP215-DK because we are currently upstreaming. I backported your series to the STM32 fork based on v6.18, but I had to modify it because of some compilation issues, so I cannot say I tested your series as-is. Overall, I’m okay with your patch, I have a few suggestions: > + stmmac_legacy_serdes_power_down(priv); > + mutex_unlock(&priv->lock); > + rtnl_unlock(); > + return ret; replace these 4 lines with: `goto error_unlock;` > @@ -8503,6 +8577,18 @@ int stmmac_resume(struct device *dev) > stmmac_free_tx_skbufs(priv); > stmmac_clear_descriptors(priv, &priv->dma_conf); > > + for (queue = 0; queue < priv->plat->rx_queues_to_use; queue++) { > + ret = stmmac_reinit_rx_descriptors(priv, &priv->dma_conf, queue); > + if (ret) { > + netdev_err(ndev, "Failed to restore RX queue %u: %d\n", > + queue, ret); > + stmmac_legacy_serdes_power_down(priv); > + mutex_unlock(&priv->lock); > + rtnl_unlock(); > + return ret; > + } > + } > + > ret = stmmac_hw_setup(ndev); > if (ret < 0) { > netdev_err(priv->dev, "%s: Hw setup failed\n", __func__); You could move the calls to `stmmac_free_tx_skbufs()`, `stmmac_clear_descriptors()`, and your loop into a dedicated function, perhaps something like `stmmac_resume_descriptors()`. In my PR, I also factorized the loops so there is one for TX and one for RX, instead of one loop for TX and RX in `stmmac_clear_descriptors()`, one loop for TX in `stmmac_free_tx_skbufs()`, and one loop for RX to rebuild them. By doing this, I managed to remove the `stmmac_free_tx_skbufs()` function. It changes the PM sequence a bit, but I think it is okay. I’ll let you decide whether you want to do it or not. > + /* GMAC4/XGMAC secondary address writes overwrite the OWN bit. */ > + dma_wmb(); > + for (i = 0; i < dma_conf->dma_rx_size; i++) { > + buf = &rx_q->buf_pool[i]; > + if (rx_q->xsk_pool && !buf->xdp) > + continue; > + > + p = stmmac_get_rx_desc(priv, rx_q, i); > + stmmac_set_rx_owner(priv, p, false); > + } Since on GMAC4/XGMAC we need to set the owner bit after writing the secondary address, why do we need to call `stmmac_clear_descriptors()` before reinitializing the RX descriptors? Since `stmmac_clear_descriptors()` is a loop that calls `stmmac_init_rx_desc()`, and I verified that all `.init_rx_desc` ops set the OWN bit to 1, could we call `stmmac_clear_descriptors()` after rebuilding the RX descriptors instead and remove this loop ? Best regards, Thomas