From: Dave <dave.jiang@gmail.com>
To: Andi Kleen <ak@suse.de>
Cc: linux-kernel@vger.kernel.org
Subject: Re: x86_64 segfault error codes
Date: Wed, 14 Dec 2005 12:24:42 -0700 [thread overview]
Message-ID: <8746466a0512141124u68c3f5c9o3411c8af64667d8d@mail.gmail.com> (raw)
In-Reply-To: <p73hd9b8r9w.fsf@verdi.suse.de>
Ah ok, thx! Looks like the comment in mm/fault.c is wrong then.... It
says bit 3 is instruction fetch and no mention of bit 4.
On 14 Dec 2005 19:31:07 +0100, Andi Kleen <ak@suse.de> wrote:
> Dave <dave.jiang@gmail.com> writes:
>
> > For segfault error codes on x86_64, bits 0-3 are documented in
> > arch/x86_64/mm/fault.c. However, I am getting error 0x14 and 0x15 with this
> > particular user app when it segfaults. Is bit 4 valid and what does that
> > imply?
>
> bit 4 is documented too in 2.6. It means it was an instruction fetch.
> The error code is just the architectural error code for page faults
> BTW, see the Intel and AMD manuals for details.
>
> -Andi
>
--
-= Dave =-
next prev parent reply other threads:[~2005-12-14 19:24 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-12-14 18:17 Dave
2005-12-14 18:31 ` Andi Kleen
2005-12-14 19:24 ` Dave [this message]
2005-12-14 19:58 ` Andi Kleen
2005-12-14 20:09 ` Dave
2005-12-15 9:55 ` Hugh Dickins
2005-12-15 9:59 ` Andi Kleen
2005-12-15 14:49 ` Andi Kleen
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