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From: Corentin LABBE <clabbe.montjoie@gmail.com>
To: Omer Khaliq <okhaliq@caviumnetworks.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-crypto@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, bhelgaas@google.com,
	mpm@selenic.com, herbert@gondor.apana.org.au,
	Ananth.Jasty@cavium.com, David.Daney@cavium.com
Subject: Re: [PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC.
Date: Wed, 24 Aug 2016 07:46:19 +0200	[thread overview]
Message-ID: <874d0bce-cf9b-8772-5af4-ec3844b3b255@gmail.com> (raw)
In-Reply-To: <1471994835-2423-3-git-send-email-okhaliq@caviumnetworks.com>

Hello

> +/* Read data from the RNG unit */
> +static int cavium_rng_read(struct hwrng *rng, void *dat, size_t max, bool wait)
> +{
> +	struct cavium_rng *p = container_of(rng, struct cavium_rng, ops);
> +	unsigned int size = max;
> +
> +	while (size >= 8) {
> +		*((u64 *)dat) = readq(p->result);
> +		size -= 8;
> +		dat += 8;
> +	}

I think you could use readsq()
This will increase throughput

Regards

LABBE Corentin

  reply	other threads:[~2016-08-24  5:49 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-23 23:27 [PATCH v2 0/2] HWRNG/PCI: Add driver for Cavium Thunder RNG Omer Khaliq
2016-08-23 23:27 ` [PATCH v2 1/2] PCI: quirk fixup for cavium invalid sriov link value Omer Khaliq
2016-08-24 16:47   ` Bjorn Helgaas
2016-08-23 23:27 ` [PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC Omer Khaliq
2016-08-24  5:46   ` Corentin LABBE [this message]
2016-08-24 23:07     ` David Daney
2016-08-31 15:17 ` [PATCH v2 0/2] HWRNG/PCI: Add driver for Cavium Thunder RNG Herbert Xu

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