From: Saeed Mahameed <saeedm@nvidia.com>
To: "jamesspader.linux@gmail.com" <jamesspader.linux@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: Saeed Mahameed <saeedm@nvidia.com>, Raed Salem <raeds@nvidia.com>,
"Huy Nguyen" <huyn@nvidia.com>
Subject: Re: mlx5 HW crypto offload support
Date: Tue, 16 Feb 2021 21:56:40 +0000 [thread overview]
Message-ID: <875d20889c9528190cd661202030b6fccc25d120.camel@nvidia.com> (raw)
In-Reply-To: <CAKpeocV5osRZL2W+rXJVOQS0vcTCBXNp4aWMsVs9TqjhpBuEBA@mail.gmail.com>
On Mon, 2021-02-15 at 23:17 +0530, James Spader wrote:
> Hi All,
>
> Does HW crypto offload support for mlx5 work under virtualized
> environment?
> For e.g with PF (Physical Function) driver and VF(Virtual Function)
> driver.
>
> If yes, then how does the information that is required to create
> security association get passed to the PF driver?
>
> For example in rx full offload the FDB table needs to match the spi.
> As the spi is created by the VF driver, how does its value get
> communicated to PF driver...
>
Hi James,
please find this guide [1] for a step by step configuration, i hope it
will answer your questions.
the solution is only in OFED package right now, Huy and Raed "CCed" are
working on the upstream submission.
The link below discusses the configuration for Bluefield smart device,
but the concept should be the same for Native SRIOV.
[1]
https://community.mellanox.com/s/article/ConnectX-6DX-Bluefield-2-IPsec-HW-Full-Offload-Configuration-Guide
next prev parent reply other threads:[~2021-02-16 21:57 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-15 17:47 James Spader
2021-02-16 21:56 ` Saeed Mahameed [this message]
2021-02-17 2:51 ` James Spader
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