From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=185.246.84.56 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1792749129; b=MGHrRwMNFB4tyIRhfm4jnxmLizxd9mtUW6ZHNz2ILheM+AAU57UlLrV8kfQjSELykCHN YrbkTAsxiOPVEDd5GwYSLRCqUYoV4DZpJtAMc3mLk9zdEzY/4VCrOiYAhbRD1cC7G5R// sN5WLKwVR5M9dIz9mc1OLRhQNY8aMmziOT7J3zOMFCRk36IrMKNWCjKhNe08gsVEZKeZP jbSvoNpkrNgYOrFyqQ0c6ekkTC0Br7iNjGMyNMrH376E05pbvl5VqwVFJEPqzn+jjKjaN E1aJ9c+hWaermrVTXp+iN48LQ3QiwFrYXnu/5Ldb5Qk2CNRUiGux+0u623MI6TgIdXA== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1792749129; h=DMARC-Filter:Received:Received:Received:DKIM-Signature:From:To:Cc: Subject:In-Reply-To:References:User-Agent:Date:Message-ID: MIME-Version:Content-Type:Content-Transfer-Encoding: X-Last-TLS-Session-Version; bh=hGktRpAovBNP2O/hbEpgY8U5f/oq3Xu2oDGMSALMQuM=; b=vw6yqmYyrrq9thi/auw3JKoGGPFPQHtiy0rFFmhYh6F+bBVTN2KpO7n+m879ec7HZZ7O uru0J2DuWBeoe+nLuwRFk44fk+aT+6t2appE+n1PsyWFODT+X9mbYQxsawl2CZMENCuBM nbfozLPMMQU8GM/qFTkK31E+fYRQ1EQfvybEtsSFSErSZYqXniC5L86UwHTkaIpy6JIdR TE25NtdwsRgXjL6HEcIHT6cei+eGpdpdyVK22O/nw78YdcxbAXsSmRqp2DGGxoyBGiGvv 0a+sX5pwBGVrwq3DgOuRrBgptEv2x5ZPMUtogj//MKlOMAGzOkXOFNoqCnemC2+erAg== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256 header.s=dkim header.b=DW8YfnRJ; arc=none smtp.remote-ip=185.246.84.56 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76D01606A31A for ; Fri, 23 Oct 2026 09:52:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.2 smtp.subspace.kernel.org 76D01606A31A Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256 header.s=dkim header.b=DW8YfnRJ Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id C9E311A12F4; Fri, 23 Oct 2026 09:52:05 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 9CCE860398; Fri, 23 Oct 2026 09:52:05 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 426EB10328BF4; Fri, 23 Oct 2026 11:52:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1792749124; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=hGktRpAovBNP2O/hbEpgY8U5f/oq3Xu2oDGMSALMQuM=; b=DW8YfnRJV9XAKi/jv8v6qHBDZJqJ+626gsZ4gcIQRZnswwef9yBaCgHKequgDHpGIWmcVd uyHh/UlBRIM8CmqkHC8iRJs7bcLcei4bf+xD0XWyUcYC+kFx9OnF/OCIdCuofu3SpD8o/3 fhQhRRwHpZ5my1R9rKmSZW2OyenqBggHnYNicZUUQF2PVG48NYRU9UzOgM+9pjMg9ACLyG 7ErYUw9qvvmDwHPoxzYHgwS/PdFjHx0RzGL2UjE4j3oiKXgOutmo49asaLNsI60gVuT9dS QvBDz4ds4xvIOFgiyvwXFsZfEeMqRw1TURbcP9z6Q4mmPggB5H8KXrd2D6ncxw== From: Miquel Raynal To: Changhuang Liang Cc: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Mark Brown , Richard Weinberger , Vignesh Raghavendra , "linux-spi@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-mtd@lists.infradead.org" Subject: Re: [PATCH v1 1/4] spi: dw: Add DDR (Dual Data-Rate) support for enhanced SPI mode In-Reply-To: (Changhuang Liang's message of "Fri, 23 Oct 2026 09:42:56 +0000") References: <20261022102614.75696-1-changhuang.liang@starfivetech.com> <20261022102614.75696-2-changhuang.liang@starfivetech.com> <87bj8mqaof.fsf@bootlin.com> User-Agent: mu4e 1.12.12; emacs 30.2 Date: Fri, 23 Oct 2026 11:52:00 +0200 Message-ID: <877bj8pwvz.fsf@bootlin.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 >> > --- a/drivers/spi/spi-dw-core.c >> > +++ b/drivers/spi/spi-dw-core.c >> > @@ -46,6 +46,8 @@ struct dw_spi_enh_cfg { >> > u8 inst_l; >> > u8 addr_l; >> > u8 trans_t; >> > + bool inst_ddr; >> > + bool spi_ddr; >>=20 >> If I understand this correctly, spi_ddr is quite a bad name because it m= eans >> address and dummy and data ddr (but not instr). Can you try to come up w= ith >> a better name for this variable? > > spi_ddr is named exactly that way on the register field. Perhaps I won't = change=20 > this variable name, and just add some comments to this variable=E2=80=94w= hat > do you think? This is a boolean, not a register bit field. Please use a name that makes sense here. This is the part of the software that people must understanding without deep hardware knowlege. You can keep the hardware name for naming the bitfield operation if that's relevant though. >> Also, if my above understanding is correct, you must provide a >> supports_op() callback which would refuse any xS-xS-xD but allow xD-xD-xD >> and xS-xD-D modes. > > OK, I'll add some filter conditions. > > Best Regards, > Changhuang