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From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
	gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl,
	acme@kernel.org, mingo@redhat.com, corbet@lwn.net,
	nicolas.pitre@linaro.org
Cc: adrian.hunter@intel.com, zhang.chunyan@linaro.org,
	mike.leach@arm.com, tor@ti.com, al.grant@arm.com,
	pawel.moll@arm.com, linux-arm-kernel@lists.infradead.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	mathieu.poirier@linaro.org
Subject: Re: [PATCH V2 20/30] coresight: etb10: implementing buffer set/reset() API
Date: Tue, 20 Oct 2015 12:56:47 +0300	[thread overview]
Message-ID: <877fmhhnhc.fsf@ashishki-desk.ger.corp.intel.com> (raw)
In-Reply-To: <1445192687-24112-21-git-send-email-mathieu.poirier@linaro.org>

Mathieu Poirier <mathieu.poirier@linaro.org> writes:

> Implementing perf related APIs to activate and terminate
> a trace session.  More specifically dealing with the sink
> buffer's internal mechanic along with perf's API to start
> and stop interactions with the ring buffers.

A matter of preference, but I'd say that it would be easier to review
this part if you merged all the buffer related patches together.

> +static void etb_reset_buffer(struct coresight_device *csdev,
> +			     struct perf_output_handle *handle,
> +			     void *sink_config)
> +{
> +	struct cs_buffers *buf = sink_config;
> +	struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
> +
> +	if (buf) {
> +		/*
> +		 * In snapshot mode ->data_size holds the new address of the
> +		 * ring buffer's head.  The size itself is the whole address
> +		 * range since we want the latest information.
> +		 */
> +		if (buf->snapshot)
> +			handle->head = local_xchg(&buf->data_size,
> +						  buf->nr_pages << PAGE_SHIFT);

Does it make sense to do this in etb_update_buffer() instead?

> +		perf_aux_output_end(handle, local_xchg(&buf->data_size, 0),
> +				    local_xchg(&buf->lost, 0));

The corresponding perf_aux_output_begin() is done in etm_event_add(),
I'd suggest that you do this in etm_event_del(),
unconditionally. Otherwise you're risking ending up with a refcount leak
and all sorts of horror.

Regards,
--
Alex

  reply	other threads:[~2015-10-20  9:56 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-18 18:24 [PATCH V2 00/30] Coresight integration with perf Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier
2015-10-19 18:37   ` Greg KH
2015-10-18 18:24 ` [PATCH V2 02/30] coresight: etm3x: moving sysFS entries to dedicated file Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 03/30] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 04/30] coresight: etm3x: splitting struct etm_drvdata Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 05/30] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 06/30] coresight: clearly labeling source operarions Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 07/30] coresight: etm3x: moving etm_drvdata::enable to atomic field Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 08/30] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 09/30] coresight: etm3x: changing default trace configuration Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 10/30] coresight: etm3x: consolidating initial config Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 11/30] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 12/30] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 13/30] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 14/30] coresight: etm3x: implementing perf_start/stop() API Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 15/30] coresight: making coresight_build_paths() public Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 16/30] coresight: keeping track of enabled sink buffers Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 17/30] perf: changing pmu::setup_aux() parameter to include event Mathieu Poirier
2015-10-19 13:34   ` Alexander Shishkin
2015-10-18 18:24 ` [PATCH V2 18/30] coresight: etb10: moving to local atomic operations Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Mathieu Poirier
2015-10-19 13:44   ` Alexander Shishkin
2015-10-20 16:40     ` Mathieu Poirier
2015-10-20 11:37   ` Alexander Shishkin
2015-10-18 18:24 ` [PATCH V2 20/30] coresight: etb10: implementing buffer set/reset() API Mathieu Poirier
2015-10-20  9:56   ` Alexander Shishkin [this message]
2015-10-20 17:30     ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 21/30] coresight: etb10: implementing buffer update API Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-10-19 15:37   ` Alexander Shishkin
2015-10-20 16:43     ` Mathieu Poirier
2015-10-20  9:34   ` Alexander Shishkin
2015-10-20 19:15     ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 23/30] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 24/30] perf tools: making function set_max_cpu_num() non static Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 25/30] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 26/30] perf tools: making source devices path broadly accessible Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 27/30] perf build: adding X86 auxiliary specific flags Mathieu Poirier
2015-10-19 10:40   ` Adrian Hunter
2015-10-18 18:24 ` [PATCH V2 28/30] perf tools: making coresight PMU listable Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 29/30] perf tools: adding coresight define for auxtrace Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 30/30] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier

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