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Mon, 19 Oct 2026 23:25:01 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c409239c154sm451125366b.87.2026.10.19.23.24.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Oct 2026 23:25:00 -0700 (PDT) Message-ID: <878766b7-b450-42ae-be1a-84662e93f8da@oss.qualcomm.com> Date: Tue, 20 Oct 2026 08:24:57 +0200 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] phy: qualcomm: m31-eusb2: Add register XCFGI_159_152 for SE0 recovery To: Peter Chen , Vinod Koul Cc: Neil Armstrong , Manivannan Sadhasivam , Elson Serrao , Ronak Raheja , Wesley Cheng , Udipto Goswami , Jack Pham , Pratham Pratap , Krishna Kurapati , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org References: <20261020061811.3127511-1-peter.chen@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261020061811.3127511-1-peter.chen@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: tg8YMRbQLdo7QZFhwB9F4UgON7jZXa8s X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIwMDAyNSBTYWx0ZWRfXzWvNd0SS7tAv gZfWECg0UH9uEb3myT77FhuIV1G7uIsmh0g7m3KTYo8rJUKxBJWYVcODsTh6YKwp1nJE5RU2Ij5 e8K/Y6jDIEqAC19e0/BR3gIxNwtRPPo= X-Proofpoint-ORIG-GUID: tg8YMRbQLdo7QZFhwB9F4UgON7jZXa8s X-Authority-Analysis: v=2.4 cv=A5z5rKWG c=1 sm=1 tr=0 ts=6ad7093e cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=HTHHE6YBwdBvLKPXtpkA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIwMDAyNSBTYWx0ZWRfXxd8Q54sm3xQS rpJYxKZZQgBhf1cLEwmQ7RPuv8Hp7tVbKj5judvdEMSu72vOq/nfXq6RSD9bIMp8eC6gPAESats ZpCRYtol08L/bmK3XT6vYtouMYC7twqgncfOaz/V5ayjZY8BkdBfbQ3SFMqNq41L0afjg1L2v+W 1hSCaxOO4of8vbmzbNE3q1ZgMDXcUKcFht59kzqDYNxmV2YY5XImEgAuBm28mhG9kclXK6/SKle QyA7fDfDbliXUV7l1mxQR4S5no0wk+MTxmsiYOwQcqRSoR9gi/gWTXSH9Xer8nTbz4BB3WRjCGA jFoQDWxuLo+2uiQzQZKLe/t7O/F3cZyIIxSNDm2vbfb6VX9dt4wBs6tIZ64WyKAFnEyAjQlfILZ Q2I7UeQhm0GLau8aKPswjCCc54B5uzGczpVSEhgojFCf39MxBRxeVdWPHkdJZlMxluwKY2ftdhJ a1KWA0+Tjtq9PBwFLRg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-20_01,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 adultscore=0 priorityscore=1501 suspectscore=0 phishscore=0 spamscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610200025 On 10/20/26 8:18 AM, Peter Chen wrote: > From: Elson Serrao > > This patch introduces support for the XCFGI_159_152 register to enable a > hardware-based SE0 recovery mechanism in the M31 PHY when operating in > host mode. "support for the register" sounds a little odd but okay > During PHY initialization, spurious pulses from external devices can > interfere with speed negotiation, potentially leading to abnormal > behavior. To mitigate this, the M31 PHY provides a fail-safe mechanism > controlled by bit 159 of the XCFGI register. > > When XCFG_SE0_TIMEOUT_EN (bit 159) is set, a hardware counter is > activated to monitor the SE0 state. If SE0 persists for more than 2.5 ms > before entering L0 mode, the PHY interprets this as bus inactivity and > resets the state machine to its default state. After transitioning to > L0, the PHY resumes normal operation in accordance with the eUSB > specification. > > Signed-off-by: Elson Serrao > Signed-off-by: Peter Chen > --- Fixes: 9c8504861cc4 ("phy: qcom: Add M31 based eUSB2 PHY driver") Reviewed-by: Konrad Dybcio Konrad