From: Thomas Gleixner <tglx@linutronix.de>
To: Anand K Mistry <amistry@google.com>, x86@kernel.org
Cc: joelaf@google.com, asteinhauser@google.com, bp@alien8.de,
Anand K Mistry <amistry@google.com>,
Andy Lutomirski <luto@kernel.org>,
Ben Segall <bsegall@google.com>,
Catalin Marinas <catalin.marinas@arm.com>,
"Chang S. Bae" <chang.seok.bae@intel.com>,
Daniel Bristot de Oliveira <bristot@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Fenghua Yu <fenghua.yu@intel.com>,
Gabriel Krisman Bertazi <krisman@collabora.com>,
"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
Jay Lang <jaytlang@mit.edu>, Jens Axboe <axboe@kernel.dk>,
Juri Lelli <juri.lelli@redhat.com>,
Kees Cook <keescook@chromium.org>,
Lai Jiangshan <laijs@linux.alibaba.com>,
Mel Gorman <mgorman@suse.de>, Mike Rapoport <rppt@kernel.org>,
Oleg Nesterov <oleg@redhat.com>,
Peter Collingbourne <pcc@google.com>,
Peter Zijlstra <peterz@infradead.org>,
Steven Rostedt <rostedt@goodmis.org>,
Tony Luck <tony.luck@intel.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v2 1/2] x86/speculation: Allow per-process control of when to issue IBPB
Date: Mon, 03 May 2021 10:48:21 +0200 [thread overview]
Message-ID: <878s4wdwyy.ffs@nanos.tec.linutronix.de> (raw)
In-Reply-To: <20210429184101.RFC.v2.1.Iadd904c1764f3bfe260db30fe41bdb9b8f98533d@changeid>
Anand,
On Thu, Apr 29 2021 at 18:44, Anand K. Mistry wrote:
>
> -static inline unsigned long mm_mangle_tif_spec_ib(struct task_struct *next)
> +static inline unsigned long mm_mangle_tif_spec_ib_on_leave(
> + struct task_struct *next)
> {
> unsigned long next_tif = task_thread_info(next)->flags;
> - unsigned long ibpb = (next_tif >> TIF_SPEC_IB) & LAST_USER_MM_IBPB;
> + unsigned long spec_disabled =
> + (next_tif >> TIF_SPEC_IB) & ~(next_tif >> TIF_NO_IBPB_LEAVE);
> + unsigned long ibpb = spec_disabled & LAST_USER_MM_IBPB;
>
> return (unsigned long)next->mm | ibpb;
> }
>
> +static inline bool ibpb_on_entry(struct task_struct *next)
> +{
> + unsigned long next_tif = task_thread_info(next)->flags;
> + unsigned long spec_disabled =
> + (next_tif >> TIF_SPEC_IB) & ~(next_tif >> TIF_NO_IBPB_ENTRY);
> + return spec_disabled & 1;
> +}
Why exactly do we need _three_ TIF bits and this non-intuitive inverted
logic?
The existing mode is: Issue IBPB when scheduling in and when scheduling out.
Ergo the obvious approach for making it more finegrained is to split the
existing TIF_SPEC_IB into TIF_SPEC_IB_IN and TIF_SPEC_IB_OUT and have
the existing mode both bits set.
Thanks,
tglx
next prev parent reply other threads:[~2021-05-03 8:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-29 8:44 [RFC PATCH v2 0/2] x86/speculation: Add finer control for " Anand K Mistry
2021-04-29 8:44 ` [RFC PATCH v2 1/2] x86/speculation: Allow per-process control of " Anand K Mistry
2021-05-03 8:48 ` Thomas Gleixner [this message]
2021-05-11 8:39 ` Anand K. Mistry
2021-04-29 8:44 ` [RFC PATCH v2 2/2] selftests: Benchmark for the cost of disabling IB speculation Anand K Mistry
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