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Tue, 10 Feb 2026 01:40:51 -0800 (PST) X-Received: by 2002:a05:6a00:2341:b0:7b9:8142:96f4 with SMTP id d2e1a72fcca58-824879b4c2amr1487349b3a.21.1770716450825; Tue, 10 Feb 2026 01:40:50 -0800 (PST) Received: from [10.217.216.195] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82441690235sm13508078b3a.18.2026.02.10.01.40.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Feb 2026 01:40:50 -0800 (PST) Message-ID: <87985615-e8a7-4ded-b082-8d1cb91d49af@oss.qualcomm.com> Date: Tue, 10 Feb 2026 15:10:45 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS To: Dmitry Baryshkov Cc: Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Raviteja Laggyshetty , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mike Tipton References: <20260202070534.1281652-1-odelu.kukatla@oss.qualcomm.com> <20260202070534.1281652-2-odelu.kukatla@oss.qualcomm.com> <95d42fb7-2365-46a0-a995-c9cc51b17424@oss.qualcomm.com> Content-Language: en-US From: Odelu Kukatla In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjEwMDA4MCBTYWx0ZWRfX7sfjkl/0gMO4 iYA3+H+YgDuWuy5YyZYdvh/n60glvQzRnROCWvBWpTzEbgFCXqhwLtzZv3NvA5JCGPWWY2/wCAg Swg6tSFyB4h/opzfdDVNWv6J5qzbhGzm5DRj15mQIqwYaSHXgdCqi5INe6dODYhbBHRjDazMchn RDKQwU3wc3rNLGDU4Tj2IVnaby4lBncRk+bjDfKsr6+4zNqDCm/yWKzBPb7G5c0s4KXEdm0uAWf Ufl4TataPBDDTlpyiM/ofnAuB5/uCH6XxmXbh0onnDvqZpQ6Bqy6kERcGIfQDhQZ+TqZzC2ME5j uZ9zBYZf9fz3hrISZ6PqkitJEAMn/9Olm1gyTDxXE7PxjDjRrGtat2BFtT7F1dbZz73TdZV6qec FrnU0AimA/zAXMMpV8Xbiq6xtj3COpmoABLQbT8n+vQ9KDWjv6W4rdhmWKEFaQsQmWDtbW2jyIp 882GGCL+VHfqlm319rw== X-Authority-Analysis: v=2.4 cv=P+Q3RyAu c=1 sm=1 tr=0 ts=698afd24 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=C88Ajdsh_gp41bVUDNUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-ORIG-GUID: HFMnwfarmZLdPMMmB04mDAV3v0AdgeQP X-Proofpoint-GUID: HFMnwfarmZLdPMMmB04mDAV3v0AdgeQP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-09_01,2026-02-09_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602100080 On 2/6/2026 12:21 PM, Dmitry Baryshkov wrote: > On Fri, Feb 06, 2026 at 10:28:15AM +0530, Odelu Kukatla wrote: >> >> >> On 2/5/2026 3:59 PM, Dmitry Baryshkov wrote: >>> On Thu, Feb 05, 2026 at 03:10:31PM +0530, Odelu Kukatla wrote: >>>> >>>> >>>> On 2/5/2026 2:31 PM, Konrad Dybcio wrote: >>>>> On 2/5/26 7:06 AM, Odelu Kukatla wrote: >>>>>> >>>>>> >>>>>> On 2/2/2026 4:33 PM, Konrad Dybcio wrote: >>>>>>> On 2/2/26 8:05 AM, Odelu Kukatla wrote: >>>>>>>> Aggre1-noc interconnect node on QCS615 has QoS registers located >>>>>>>> inside a block whose interface is clock-gated. For that node, >>>>>>>> driver must enable the corresponding clock(s) before accessing >>>>>>>> the registers. Add the 'clocks' property so the driver can obtain >>>>>>>> and enable the required clock(s). >>>>>>>> >>>>>>>> Only interconnects that have clock‑gated QoS register interface >>>>>>>> use this property; it is not applicable to all interconnect nodes. >>>>>>>> >>>>>>>> Signed-off-by: Odelu Kukatla >>>>>>>> --- >>>>> >>>>> [...] >>>>> >>>>>>>> + - if: >>>>>>>> + properties: >>>>>>>> + compatible: >>>>>>>> + contains: >>>>>>>> + enum: >>>>>>>> + - qcom,qcs615-aggre1-noc >>>>>>>> + then: >>>>>>>> + properties: >>>>>>>> + clocks: >>>>>>>> + items: >>>>>>>> + - description: aggre UFS PHY AXI clock >>>>>>>> + - description: aggre USB2 SEC AXI clock >>>>>>>> + - description: aggre USB3 PRIM AXI clock >>>>>>> >>>>>>> Should we also include the IPA clock here? >>>>>>> >>>>>> >>>>>> Thanks for the review! >>>>>> >>>>>> For QCS615, the IPA clock is already enabled by the bootloader (xBL) and >>>>>> kept on during the boot‑up stage. Because of this, we do not need to >>>>>> explicitly enable the IPA clock in the interconnect driver when >>>>>> accessing the QoS registers. >>>>> >>>>> Would we need to re-enable it to re-program the hardware if say the >>>>> icc module is loaded after unused clk cleanup or after a cx collapse? >>>>> >>>> >>>> IPA clock is not managed by GCC clock controller driver, so >>>> clk_disable_unused does not disable it. >>> >>> The clk_disable_unused is not limited to the GCC. The clock is managed >>> by the clk-rpmh, so clk_disable_unused applies to it too. >>> >> >> clk_disable_unused()/clk_disable_unused_subtree() does not disable RPMh >> managed clocks, so it does not apply to IPA clock. > > You are describing the current behaviour of one OS. The DTS should be > describing the hardware. Other platforms describe IPA clock used by the > aggre NoC nodes. > I will update the bindings and the device tree to include the IPA clock for the Aggre1 NoC node to ensure the driver handles it correctly, aligning with other platforms. I will send out V2 with these changes. Thanks, Odelu >> >>>> As a result, the icc provider >>>> does not need to re enable an IPA clock for QoS access after unused clk >>>> cleanup. And QCS615 does *not* support Cx collapse. >>> >>> Does lack of CX collapse apply to SM6150? >>> >> >> SM6150, QCS615, and Talos are all names referring to the same underlying >> SoC family. > > Ack, I was making sure that lack of CX collapse isn't related to IoT vs > mobile case. >