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Thu, 21 Aug 2025 08:35:56 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:da43:aeff:fecc:bfd5]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-325154b70e0sm71365a91.29.2025.08.21.08.35.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:35:55 -0700 (PDT) Sender: Guenter Roeck Date: Thu, 21 Aug 2025 08:35:55 -0700 From: Guenter Roeck To: Sangwook Shin Cc: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, semen.protsenko@linaro.org, dongil01.park@samsung.com, khwan.seo@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 5/5] watchdog: s3c2410_wdt: exynosautov9: Enable supported features Message-ID: <8798e925-6c99-4efe-a0e8-5cedf04a3403@roeck-us.net> References: <20250818021826.623830-1-sw617.shin@samsung.com> <20250818021826.623830-6-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250818021826.623830-6-sw617.shin@samsung.com> On Mon, Aug 18, 2025 at 11:18:26AM +0900, Sangwook Shin wrote: > Enable supported features for ExynosAutov9 SoC. > - QUIRK_HAS_DBGACK_BIT > - QUIRK_HAS_32BIT_CNT > > Reviewed-by: Sam Protsenko > Signed-off-by: Sangwook Shin Reviewed-by: Guenter Roeck > --- > drivers/watchdog/s3c2410_wdt.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c > index 915d3c88565a..b774477190b6 100644 > --- a/drivers/watchdog/s3c2410_wdt.c > +++ b/drivers/watchdog/s3c2410_wdt.c > @@ -306,7 +306,8 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl0 = { > .cnt_en_reg = EXYNOS850_CLUSTER0_NONCPU_OUT, > .cnt_en_bit = 7, > .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | > - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN, > + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | > + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, > }; > > static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 = { > @@ -318,7 +319,8 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 = { > .cnt_en_reg = EXYNOSAUTOV9_CLUSTER1_NONCPU_OUT, > .cnt_en_bit = 7, > .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | > - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN, > + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | > + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, > }; > > static const struct s3c2410_wdt_variant drv_data_gs101_cl0 = { > -- > 2.25.1 > >