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Wed, 26 Aug 2026 14:34:26 +0000 (GMT) Received: from li-008a6a4c-3549-11b2-a85c-c5cc2836eea2.ibm.com (unknown [9.224.92.206]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTPS; Wed, 26 Aug 2026 14:34:26 +0000 (GMT) Date: Wed, 26 Aug 2026 16:34:25 +0200 From: Alexander Gordeev To: Heiko Carstens Cc: Gerald Schaefer , Christian Borntraeger , Vasily Gorbik , Claudio Imbrenda , Andrey Ryabinin , linux-s390@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com Subject: Re: [PATCH v7 2/4] s390/mm: Batch PTE updates in lazy MMU mode Message-ID: <87a3147f-e993-4629-b0dd-a54aefbf20b1-agordeev@linux.ibm.com> References: <20260824104048.11040Cdc-hca@linux.ibm.com> <73a0a916-b39f-4ebe-bffe-448928b13bef-agordeev@linux.ibm.com> <20260826130257.21444B1a-hca@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260826130257.21444B1a-hca@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Info: AW1haW4tMjYwODI2MDEyMSBTYWx0ZWRfX9d0D4fznnW9a dTrhFYqWYFysmfgSZ1txZuW6iXZDoIJarDIoVq86gmVpjGrAbjDS0To3u+4gTkEAy/M1WshVaH6 c39yTFfj+xq+++UAA5ZNRMYpXkO+cC8= X-Proofpoint-GUID: wYHuOR7MKgKkRlRWI8pHiU2wMZ88MTiq X-Proofpoint-ORIG-GUID: _aZxFR0LsBp_ue5V73CXJzLqrAptb0CQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI2MDEyMSBTYWx0ZWRfX1R4p72y7Hl9c Y7etrjktOF7GCy01TJgymVg7ANPeWwQ14gvKJKrseK6x43+BPLSzUIJ8x4wPRp2Eymw8ON1bTan BJ+WVecuVX2dJP5ug58w2lphe8lZuV3hbyb0PWQ8S/JVsY4abgYQe9js+XWVkaveUzDWKHKkgr8 Wh05TXsvfJmupwo2m5/wlRRcVFe1p12841x3cUprI9uSNkr2x3u5a7RTXfW8ub8vZKgv2uWOtsJ dGriXF6B+escX/NB9g5hxr16BWjsKhOjhYb/VEzTtFxzo2el8lkm0nIlCL5H94ZVa4eOszCnar8 v0su8oZTg7ZnYErwZFazo3oQe6O7PZ46JAsJU3lgYAtY5cnCtIRTP6kEtEjw8OJT1k0gDXck4// HCYAeABUS1h3Tno8Q8dH1n4fr2c0DRpJYYBd914aXlULa991qy7UdeXCeUMFWXKMQm7Jv0pTraX +IH7Nv2GgcNQbZPbbhg== X-Authority-Analysis: v=2.4 cv=H7brBeYi c=1 sm=1 tr=0 ts=6a8ef977 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=kj9zAlcOel0A:10 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=SZl-skA7I6m2z5b9x0oA:9 a=CjuIK1q_8ugA:10 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-26_04,2026-08-26_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 bulkscore=0 adultscore=0 priorityscore=1501 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608260121 On Wed, Aug 26, 2026 at 03:02:57PM +0200, Heiko Carstens wrote: > On Wed, Aug 26, 2026 at 02:00:35PM +0200, Alexander Gordeev wrote: > > On Mon, Aug 24, 2026 at 12:40:48PM +0200, Heiko Carstens wrote: > > > On Mon, Aug 17, 2026 at 01:33:00PM +0200, Alexander Gordeev wrote: > > > > diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h > > > > index 3b3ecc647993..dba236664da9 100644 > > > > --- a/arch/s390/include/asm/lowcore.h > > > > +++ b/arch/s390/include/asm/lowcore.h > > > > @@ -163,7 +163,7 @@ struct lowcore { > > > > __s32 preempt_count; /* 0x03a8 */ > > > > __u32 spinlock_lockval; /* 0x03ac */ > > > > __u32 spinlock_index; /* 0x03b0 */ > > > > - __u8 pad_0x03b4[0x03b8-0x03b4]; /* 0x03b4 */ > > > > + __s32 lazy_mmu_count; /* 0x03b4 */ > > > > > > Why is this signed? Can it get negative? > > > > For the same reason preempt_count is signed, I guess. > > Check again, preempt_count is now unsigned and 64 bit ;) D'oh :) ... > > > > void __init arch_cpu_finalize_init(void) > > > > { > > > > + lazy_mmu_online_boot_cpu(); > > > > sclp_init(); > > > > } > > > > > > What makes this code so special that an explicit call from > > > arch_cpu_finalize_init() is required? This is really the last resort if > > > everything else fails. To me it looks like the code can be changed to use a > > > new static key, and add a generic early (pre-smp) initcall to allocate > > > memory for cpu 0, and if that succeeds enable the static key. > > > > I had exactly similar variant, but failed to resolve a race when a secondary > > CPU callback was called before the CPU0's one. Probably, used a wrong event. > > Will look into it again. > > early_initcall() should do the trick. Yep, early_initcall() + CPUHP_BP_PREPARE_DYN seems to be flying ;) > > > > + local_bh_disable(); > > > > + > > > > + lockdep_assert_preemption_disabled(); > > > > + range = this_cpu_read(ipte_range); > > > > > > Why is it required to disable bottom halves? A comment would be helpful. > > > Or a hint in the commit message - this is not obvious. > > > > When an interrupt arrives in the middle of enter|leave_ipte_range() > > the chain pcpu_addr_to_page() -> vmalloc_to_page() -> ptep_get() > > decides ptep_get() is called in lazy mode, while the per-cpu state > > not yet (de-)initialized (AKA inconsistent). That led to crashes: > > So, I don't know what exactly lead to the crash, but I guess the > problem is an only partially initialized ipte_range struct, while the > lazy_mmu_count has been incremented already? Isn't it possible to Exactly. > solve that problem without disabling bottom halves by reordering > sequences in enter_ipte_range() and leave_ipte_range()? I guess you mean setting|unsetting the lazy mmu flag after|before the state is initialized? I will think about it, though I keep the door open for a possible lazy_mmu_mode_pause()|resume() implementation, which I am unable to predict how such rework would fit: lazy_mmu_count would have to stay non-zero in such a case. > Would be nice if we could avoid the not so obvious local_bh_disable() > and local_bh_enable() pairs. Calling ptep_get() from BH context was certainly unexpected, but the way local_bh_enable|disable() pairs are used is actually straightforward. This is a slow path anyway, so I would think the simplicity prevails in this case. But again, I will try to avoid that. Thanks!