From: Thomas Gleixner <tglx@linutronix.de>
To: WeitaoWang-oc <weitaowang-oc@zhaoxin.com>,
Koichiro Den <den@valinux.co.jp>
Cc: mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
x86@kernel.org, hpa@zytor.com, linux-kernel@vger.kernel.org,
WeitaoWang@zhaoxin.com, wwt8723@163.com, CobeChen@zhaoxin.com,
stable@vger.kernel.org
Subject: Re: [此为外部邮件 谨防风险] Re: [PATCH] x86/apic/msi: Fix MSI interrupt affinity configuration
Date: Fri, 16 Oct 2026 11:30:12 +0200 [thread overview]
Message-ID: <87bj8uc7rv.ffs@fw13> (raw)
In-Reply-To: <316900d3-2ce8-4391-ad8f-556bb5540c2a@zhaoxin.com>
On Fri, Oct 16 2026 at 11:36, WeitaoWang-oc wrote:
> On 10/16/26 06:12, Thomas Gleixner wrote:
>> On Wed, Sep 30 2026 at 01:29, Koichiro Den wrote:
>>> On Tue, Sep 29, 2026 at 12:48:39AM +0800, WeitaoWang-oc wrote:
>>>> commit b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI
>>>> quirk") try to fix the issue of misconfigured non-maskable MSI quirk.
>>>> For non-maskable MSI interrupts, use the slow path to fix the MSI affinity
>>>> race. Maskable MSI interrupts use the direct path to update configuration
>>>> info. However, the current code logic is the opposite as only maskable
>>>> MSI interrupts will enable reservation mode.
> Thank you for the suggestions. I realize the problem description in my
> previous patch needed to be more precise. Before posting v3, I have
> updated the change log as shown below. Could you please take a look?
> If this looks good to you, I will send out the next version.
Looks good
next prev parent reply other threads:[~2026-10-16 9:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-28 16:48 WeitaoWang-oc
2026-09-29 16:29 ` Koichiro Den
2026-09-30 7:33 ` WeitaoWang-oc
2026-10-15 22:12 ` Thomas Gleixner
2026-10-16 3:36 ` [此为外部邮件 谨防风险] " WeitaoWang-oc
2026-10-16 9:30 ` Thomas Gleixner [this message]
2026-10-16 11:58 ` [PATCH v3] " WeitaoWang-oc
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