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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4247d0beb08sm83051605e9.17.2024.06.21.12.34.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jun 2024 12:34:01 -0700 (PDT) From: Javier Martinez Canillas To: Daniel Vetter Cc: Jocelyn Falempe , linux-kernel@vger.kernel.org, Maxime Ripard , Daniel Vetter , David Airlie , Maarten Lankhorst , Thomas Zimmermann , dri-devel@lists.freedesktop.org Subject: Re: [PATCH] drm/ssd130x: Add drm_panic support In-Reply-To: References: <20240620222222.155933-1-javierm@redhat.com> <24205cdf-a3c6-475e-ba8a-a52d039a402d@redhat.com> <87h6dmjry6.fsf@minerva.mail-host-address-is-not-set> <87ed8qjo8y.fsf@minerva.mail-host-address-is-not-set> Date: Fri, 21 Jun 2024 21:34:00 +0200 Message-ID: <87bk3ujdjr.fsf@minerva.mail-host-address-is-not-set> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain Daniel Vetter writes: Hello Sima, Thanks for your comment and explanations. > On Fri, Jun 21, 2024 at 05:42:53PM +0200, Javier Martinez Canillas wrote: >> Javier Martinez Canillas writes: >> >> > Jocelyn Falempe writes: >> > >> > Hello Jocelyn, thanks for your feedback! >> > >> >> On 21/06/2024 00:22, Javier Martinez Canillas wrote: >> >>> Add support for the drm_panic infrastructure, which allows to display >> >>> a user friendly message on the screen when a Linux kernel panic occurs. >> >>> >> >>> The display controller doesn't scanout the framebuffer, but instead the >> >>> pixels are sent to the device using a transport bus. For this reason, a >> >>> .panic_flush handler is needed to flush the panic image to the display. >> >> >> >> Thanks for this patch, that's really cool that drm_panic can work on >> >> this device too. >> >> >> > >> > Indeed, that's why I did it. Just to see if it could work :) >> > >> > [...] >> > >> >>> +static void ssd130x_primary_plane_helper_panic_flush(struct drm_plane *plane) >> >>> +{ >> >>> + struct drm_plane_state *plane_state = plane->state; >> >>> + struct ssd130x_plane_state *ssd130x_plane_state = to_ssd130x_plane_state(plane_state); >> >>> + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); >> >>> + struct drm_crtc *crtc = plane_state->crtc; >> >>> + struct ssd130x_crtc_state *ssd130x_crtc_state = to_ssd130x_crtc_state(crtc->state); >> >>> + >> >>> + ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &plane_state->dst, >> >>> + ssd130x_plane_state->buffer, ssd130x_crtc_state->data_array, >> >>> + &shadow_plane_state->fmtcnv_state); >> >> >> >> ssd130x_fb_blit_rect() will call regmap->write(), which involve mutex >> >> and might sleep. And if the mutex is taken when the panic occurs, it >> >> might deadlock the panic handling. >> > >> > That's a good point and I something haven't considered... >> > >> >> One solution would be to configure the regmap with config->fast_io and >> >> config->use_raw_spinlock, and check that the lock is available with >> >> try_lock(map->raw_spin_lock) >> >> But that means it will waste cpu cycle with busy waiting for normal >> >> operation, which is not good. >> >> >> > >> > Yeah, I would prefer to not change the driver for normal operation. >> > >> >> Another option, that I believe makes more sense, is to just disable the >> regmap locking (using struct regmap_config.disable_locking field [0]). >> >> Since this regmap is not shared with other drivers and so any concurrent >> access should already be prevented by the DRM core locking scheme. >> >> Is my understanding correct? > > Quick irc discussion summary: Since these are panels that sit on i2c/spi > buses, you need to put the raw spinlock panic locking into these > subsystems. Which is going to be extreme amounts of fun, becuase: > > - You need to protect innermost register access with a raw spinlock, but > enough so that every access is still consistent. > > - You need separate panic paths which avoid all the existing subsystem > locking (i2c/spi have userspace apis, so they need mutexes) and only > rely on the caller having done the raw spinlock trylocking. > > - Bonus points: Who even owns that raw spinlock ... > > I'm afraid, this is going to be a tough nut to crack :-/ > Yeah, not worth the effort then. I'll just drop this patch. > Cheers, Sima > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch > -- Best regards, Javier Martinez Canillas Core Platforms Red Hat