From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7140C433B4 for ; Wed, 7 Apr 2021 12:12:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 87FE761153 for ; Wed, 7 Apr 2021 12:12:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352043AbhDGMMV (ORCPT ); Wed, 7 Apr 2021 08:12:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:47162 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242763AbhDGMMT (ORCPT ); Wed, 7 Apr 2021 08:12:19 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1A212610FB; Wed, 7 Apr 2021 12:12:10 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lU72V-0064G3-UT; Wed, 07 Apr 2021 13:12:08 +0100 Date: Wed, 07 Apr 2021 13:12:07 +0100 Message-ID: <87blaqpa3s.wl-maz@kernel.org> From: Marc Zyngier To: Mark-PK Tsai Cc: Daniel Palmer , Thomas Gleixner , Matthias Brugger , , , , Subject: Re: [PATCH v4] irqchip/irq-mst: Support polarity configuration In-Reply-To: <20210315131848.31840-1-mark-pk.tsai@mediatek.com> References: <20210315131848.31840-1-mark-pk.tsai@mediatek.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: mark-pk.tsai@mediatek.com, daniel@thingy.jp, tglx@linutronix.de, matthias.bgg@gmail.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, yj.chiang@mediatek.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 15 Mar 2021 13:18:48 +0000, Mark-PK Tsai wrote: > > Support irq polarity configuration and save and restore the config > when system suspend and resume. > > Signed-off-by: Mark-PK Tsai > --- > drivers/irqchip/irq-mst-intc.c | 94 ++++++++++++++++++++++++++++++++-- > 1 file changed, 91 insertions(+), 3 deletions(-) > > diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers/irqchip/irq-mst-intc.c > index 143657b0cf28..a2ab3f837b96 100644 > --- a/drivers/irqchip/irq-mst-intc.c > +++ b/drivers/irqchip/irq-mst-intc.c > @@ -13,15 +13,27 @@ > #include > #include > #include > +#include > > -#define INTC_MASK 0x0 > -#define INTC_EOI 0x20 > +#define MST_INTC_MAX_IRQS 64 > + > +#define INTC_MASK 0x0 > +#define INTC_REV_POLARITY 0x10 > +#define INTC_EOI 0x20 > + > +#ifdef CONFIG_PM_SLEEP > +static LIST_HEAD(mst_intc_list); > +#endif > > struct mst_intc_chip_data { > raw_spinlock_t lock; > unsigned int irq_start, nr_irqs; > void __iomem *base; > bool no_eoi; > +#ifdef CONFIG_PM_SLEEP > + struct list_head entry; > + u16 saved_polarity_conf[DIV_ROUND_UP(MST_INTC_MAX_IRQS, 16)]; > +#endif > }; > > static void mst_set_irq(struct irq_data *d, u32 offset) > @@ -78,6 +90,20 @@ static void mst_intc_eoi_irq(struct irq_data *d) > irq_chip_eoi_parent(d); > } > > +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type) > +{ > + if (type != IRQ_TYPE_EDGE_RISING && type != IRQ_TYPE_EDGE_FALLING && > + type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_LEVEL_LOW) > + return -EINVAL; All of this amounts to checking for IRQ_TYPE_{NONE,EDGE_BOTH}. Maybe that's a better option. > + > + if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) > + mst_set_irq(data, INTC_REV_POLARITY); What happens if the interrupt was set to LEVEL_LOW, then switched to LEVEL_HIGH? You end up with a stuck reversed polarity. > + > + type = IRQ_TYPE_LEVEL_HIGH; > + > + return irq_chip_set_type_parent(data, type); I'm going to fix this as below. Shout if you disagree. Thanks, M. diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers/irqchip/irq-mst-intc.c index a2ab3f837b96..f6133ae28155 100644 --- a/drivers/irqchip/irq-mst-intc.c +++ b/drivers/irqchip/irq-mst-intc.c @@ -92,16 +92,20 @@ static void mst_intc_eoi_irq(struct irq_data *d) static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type) { - if (type != IRQ_TYPE_EDGE_RISING && type != IRQ_TYPE_EDGE_FALLING && - type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_LEVEL_LOW) - return -EINVAL; - - if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) + switch (type) { + case IRQ_TYPE_LEVEL_LOW: + case IRQ_TYPE_EDGE_FALLING: mst_set_irq(data, INTC_REV_POLARITY); + break; + case IRQ_TYPE_LEVEL_HIGH: + case IRQ_TYPE_EDGE_RISING: + mst_clear_irq(data, INTC_REV_POLARITY); + break; + default: + return -EINVAL; + } - type = IRQ_TYPE_LEVEL_HIGH; - - return irq_chip_set_type_parent(data, type); + return irq_chip_set_type_parent(data, IRQ_TYPE_LEVEL_HIGH); } static struct irq_chip mst_intc_chip = { -- Without deviation from the norm, progress is not possible.