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[130.180.211.218]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3b79c45346asm122454f8f.39.2025.07.30.14.15.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Jul 2025 14:15:55 -0700 (PDT) Message-ID: <87d40626-8789-4e71-8ac3-fa8fff0a7435@linaro.org> Date: Wed, 30 Jul 2025 23:15:54 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/8] arm64: dts: s32g274-rd2: Enable the STM timers To: Frank Li Cc: mbrugger@suse.com, chester62515@gmail.com, ghennadi.procopciuc@oss.nxp.com, shawnguo@kernel.org, s.hauer@pengutronix.de, s32@nxp.com, kernel@pengutronix.de, festevam@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ghennadi Procopciuc , Thomas Fossati References: <20250730195022.449894-1-daniel.lezcano@linaro.org> <20250730195022.449894-3-daniel.lezcano@linaro.org> Content-Language: en-US From: Daniel Lezcano In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 30/07/2025 22:21, Frank Li wrote: > On Wed, Jul 30, 2025 at 09:50:15PM +0200, Daniel Lezcano wrote: >> Enable the timers STM0 -> STM3 on the s32g274-rd2 >> >> The platform has 4 CPUs and the Linux STM timer driver is per >> CPU. Enable 4 timers which will be used, other timers are useless for >> the Linux kernel and there is no benefit to enable them. > > S32 have not ARM local timer? It is quite strange! I'm not saying there is no architected timers but there are the STM. May be I can reword the sentence to prevent this ambiguity. >> Signed-off-by: Daniel Lezcano >> Cc: Ghennadi Procopciuc >> Cc: Thomas Fossati >> --- >> arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 16 ++++++++++++++++ >> 1 file changed, 16 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts >> index b5ba51696f43..505776d19151 100644 >> --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts >> +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts >> @@ -40,6 +40,22 @@ &uart1 { >> status = "okay"; >> }; >> >> +&stm0 { >> + status = "okay"; >> +}; >> + >> +&stm1 { >> + status = "okay"; >> +}; >> + >> +&stm2 { >> + status = "okay"; >> +}; >> + >> +&stm3 { >> + status = "okay"; >> +}; >> + >> &usdhc0 { >> pinctrl-names = "default", "state_100mhz", "state_200mhz"; >> pinctrl-0 = <&pinctrl_usdhc0>; >> -- >> 2.43.0 >> -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog