From: Nam Cao <namcao@linutronix.de>
To: Thomas Gleixner <tglx@kernel.org>, Haofeng Li <lihaofeng@kylinos.cn>
Cc: linux-kernel@vger.kernel.org, Haofeng Li <13266079573@163.com>,
Haofeng Li <lihaofeng@kylinos.cn>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Samuel Holland <samuel.holland@sifive.com>,
linux-riscv@lists.infradead.org, Marc Zyngier <maz@kernel.org>,
Radu Rendec <radu@rendec.net>
Subject: Re: [PATCH 00/16] irqchip: harden initialization error paths
Date: Sat, 05 Sep 2026 06:11:46 +0200 [thread overview]
Message-ID: <87ik4k9w1p.fsf@yellow.woof> (raw)
In-Reply-To: <87y0e1i648.ffs@fw13>
Thomas Gleixner <tglx@kernel.org> writes:
> A lot of these "fixes" are purely cosmetic and create a false sense of
> correctness because if the initialization of the root interrupt
> controller of a system fails then machine won't boot at all.
>
> So instead of adding tons of cleanups we rather go and analyze which
> controllers are actually root controllers and therefore essential for
> the machine to boot. For those the only valid error handling is:
PLIC is one of those. I will send a patch.
Nam
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 5b0dac104814..0fbecaf0d317 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -643,13 +643,11 @@ static int plic_probe(struct fwnode_handle *fwnode)
error = plic_parse_nr_irqs_and_contexts(fwnode, &nr_irqs, &nr_contexts, &gsi_base, &id);
if (error)
- goto fail_free_regs;
+ return error;
priv = kzalloc_obj(*priv);
- if (!priv) {
- error = -ENOMEM;
- goto fail_free_regs;
- }
+ if (!priv)
+ return -ENOMEM;
priv->fwnode = fwnode;
priv->plic_quirks = plic_quirks;
@@ -668,10 +666,8 @@ static int plic_probe(struct fwnode_handle *fwnode)
priv->acpi_plic_id = id;
priv->prio_save = bitmap_zalloc(nr_irqs, GFP_KERNEL);
- if (!priv->prio_save) {
- error = -ENOMEM;
- goto fail_free_priv;
- }
+ if (!priv->prio_save)
+ return -ENOMEM;
for (i = 0; i < nr_contexts; i++) {
error = plic_parse_context_parent(fwnode, i, &parent_hwirq, &cpu,
@@ -735,10 +731,8 @@ static int plic_probe(struct fwnode_handle *fwnode)
handler->enable_save = kcalloc(priv->irq_groups, sizeof(*handler->enable_save),
GFP_KERNEL);
- if (!handler->enable_save) {
- error = -ENOMEM;
- goto fail_cleanup_contexts;
- }
+ if (!handler->enable_save)
+ return -ENOMEM;
done:
for_each_device_irq(hwirq, priv) {
plic_toggle(handler, hwirq, 0);
@@ -748,10 +742,8 @@ static int plic_probe(struct fwnode_handle *fwnode)
}
priv->irqdomain = irq_domain_create_linear(fwnode, nr_irqs, &plic_irqdomain_ops, priv);
- if (WARN_ON(!priv->irqdomain)) {
- error = -ENOMEM;
- goto fail_cleanup_contexts;
- }
+ if (!priv->irqdomain)
+ return -ENOMEM;
/*
* We can have multiple PLIC instances so setup global state
@@ -799,33 +791,13 @@ static int plic_probe(struct fwnode_handle *fwnode)
pr_info("%pfwP: mapped %d interrupts with %d handlers for %d contexts.\n",
fwnode, nr_irqs, nr_handlers, nr_contexts);
return 0;
-
-fail_cleanup_contexts:
- for (i = 0; i < nr_contexts; i++) {
- if (plic_parse_context_parent(fwnode, i, &parent_hwirq, &cpu, priv->acpi_plic_id))
- continue;
- if (parent_hwirq != RV_IRQ_EXT || cpu < 0)
- continue;
-
- handler = per_cpu_ptr(&plic_handlers, cpu);
- handler->present = false;
- handler->hart_base = NULL;
- handler->enable_base = NULL;
- kfree(handler->enable_save);
- handler->enable_save = NULL;
- handler->priv = NULL;
- }
- bitmap_free(priv->prio_save);
-fail_free_priv:
- kfree(priv);
-fail_free_regs:
- iounmap(regs);
- return error;
}
static int plic_platform_probe(struct platform_device *pdev)
{
- return plic_probe(pdev->dev.fwnode);
+ if (plic_probe(pdev->dev.fwnode))
+ panic("Failed to initialize root interrupt controller\n");
+ return 0;
}
static struct platform_driver plic_driver = {
@@ -842,7 +814,10 @@ builtin_platform_driver(plic_driver);
static int __init plic_early_probe(struct device_node *node,
struct device_node *parent)
{
- return plic_probe(&node->fwnode);
+ if (plic_probe(&node->fwnode))
+ panic("Failed to initialize root interrupt controller\n");
+ return 0;
}
IRQCHIP_DECLARE(riscv, "allwinner,sun20i-d1-plic", plic_early_probe);
prev parent reply other threads:[~2026-09-05 4:11 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-14 12:23 Haofeng Li
2026-07-14 12:23 ` [PATCH 01/16] irqchip/riscv-imsic: fix MMIO lookup OOB and NULL cleanup Haofeng Li
2026-07-14 13:15 ` Anup Patel
2026-07-25 16:13 ` Radu Rendec
2026-07-14 12:23 ` [PATCH 02/16] irqchip/loongarch-ir: fix redirect free and alloc leaks Haofeng Li
2026-07-26 2:26 ` Radu Rendec
2026-07-14 13:24 ` [PATCH 03/16] irqchip/sifive-plic: do not iounmap devm mappings Haofeng Li
2026-07-14 15:05 ` Anup Patel
2026-08-20 6:36 ` Thomas Gleixner
[not found] ` <20260714132453.3302672-1-920484857@qq.com>
2026-07-14 13:24 ` [PATCH 04/16] irqchip/crossbar: fix allocation and init cleanup Haofeng Li
2026-08-02 15:12 ` Radu Rendec
2026-08-20 6:52 ` Thomas Gleixner
2026-07-14 13:24 ` [PATCH 05/16] irqchip/bcm7038-l1: clean up init failure paths Haofeng Li
2026-07-28 17:36 ` Florian Fainelli
2026-07-14 13:24 ` [PATCH 06/16] irqchip/loongson-liointc: unmap per-core iomaps on error Haofeng Li
2026-08-02 16:31 ` Radu Rendec
2026-07-14 13:24 ` [PATCH 07/16] irqchip/mips-gic: clean up IRQ domain creation failure Haofeng Li
2026-08-02 19:19 ` Radu Rendec
2026-07-14 13:24 ` [PATCH 08/16] irqchip/mips-gic: clean up if IPI domain registration fails Haofeng Li
2026-08-02 19:26 ` Radu Rendec
2026-07-14 13:24 ` [PATCH 09/16] irqchip/econet: clean up VEIC initialization Haofeng Li
2026-07-23 1:09 ` Caleb James DeLisle
2026-07-14 13:24 ` [PATCH 10/16] irqchip/aspeed-vic: publish handler only after domain creation Haofeng Li
2026-07-14 13:24 ` [PATCH 11/16] irqchip/loongson-eiointc: preserve live state on cascade failure Haofeng Li
2026-07-14 13:24 ` [PATCH 12/16] irqchip/realtek-rtl: unmap per-CPU bases on init failure Haofeng Li
2026-07-15 6:12 ` AW: " Markus Stockhausen
2026-07-14 13:24 ` [PATCH 13/16] irqchip/realtek-rtl: dispose parent mapping on domain failure Haofeng Li
2026-07-14 13:24 ` [PATCH 14/16] irqchip/renesas-rzg2l: fix wrong errno in reset error log Haofeng Li
2026-07-14 13:24 ` [PATCH 15/16] irqchip/gic-v3: fail T241 quirk if alias ioremap fails Haofeng Li
2026-07-14 14:53 ` Marc Zyngier
2026-07-14 13:24 ` [PATCH 16/16] irqchip/bcm7120-l2: fix parent IRQ count error handling Haofeng Li
2026-07-28 15:57 ` Florian Fainelli
2026-07-25 16:29 ` [PATCH 00/16] irqchip: harden initialization error paths Radu Rendec
2026-08-20 7:49 ` Thomas Gleixner
2026-09-05 4:11 ` Nam Cao [this message]
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