From: "Björn Töpel" <bjorn@kernel.org>
To: Philipp Tomsich <philipp.tomsich@vrull.eu>,
Jessica Clarke <jrtc27@jrtc27.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Kito Cheng <kito.cheng@sifive.com>,
Conor Dooley <conor.dooley@microchip.com>,
matthias.bgg@gmail.com,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Greentime Hu <greentime.hu@sifive.com>,
nick.knight@sifive.com, christoph.muellner@vrull.eu,
richard.henderson@linaro.org, arnd@arndb.de,
linux-kernel@vger.kernel.org,
Heiko Stuebner <heiko.stuebner@vrull.eu>
Subject: Re: [PATCH 0/4] Expose the isa-string via the AT_BASE_PLATFORM aux vector
Date: Tue, 02 May 2023 09:58:38 +0200 [thread overview]
Message-ID: <87jzxrnp01.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <CAAeLtUADqnwrgBjhDd+iNfwhMU6YBiMUZzeopVMAh0Jq19W9JA@mail.gmail.com>
Philipp Tomsich <philipp.tomsich@vrull.eu> writes:
> It is a pity that the current interface was designed without involving
> RVI (and that I had to ask my team to put together a patch set for
> further discussion, given that none of the other major vendors in RVI
> stepped forward). I guarantee that plenty of reviewers would have
> highlighted that a central registry (even if it is just a kernel
> header) should be avoided.
Are you claiming that the hwprobe work was not done in the open, but
secretly merged? That is not only incorrect, but rude to upstream RISC-V
Linux developers. I suggest you review how you interact with upstream
kernel work.
Why didn't RVI get involved in the review of the series? The expectation
cannot be that all open source projects go to RVI, but rather the other
way around.
Take a look at commit ea3de9ce8aa2 ("RISC-V: Add a syscall for HW
probing"). Your team was very much involved in the review.
Björn
next prev parent reply other threads:[~2023-05-02 7:58 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-24 19:49 Heiko Stuebner
2023-04-24 19:49 ` [PATCH 1/4] RISC-V: create ISA string separately - not as part of cpuinfo Heiko Stuebner
2023-04-24 23:06 ` kernel test robot
2023-04-25 8:45 ` kernel test robot
2023-04-26 9:26 ` Andrew Jones
2023-04-26 9:44 ` Andrew Jones
2023-05-01 14:52 ` Palmer Dabbelt
2023-04-24 19:49 ` [PATCH 2/4] RISC-V: don't parse dt isa string to get rv32/rv64 Heiko Stuebner
2023-04-26 9:37 ` Andrew Jones
2023-05-01 14:51 ` Palmer Dabbelt
2023-04-24 19:49 ` [PATCH 3/4] RISC-V: export the ISA string of the running machine in the aux vector Heiko Stuebner
2023-04-25 8:13 ` kernel test robot
2023-04-25 8:13 ` kernel test robot
2023-04-26 9:40 ` Andrew Jones
2023-04-24 19:49 ` [PATCH 4/4] RISC-V: add support for vendor-extensions via AT_BASE_PLATFORM and xthead Heiko Stuebner
2023-04-26 9:42 ` Andrew Jones
2023-04-26 12:29 ` Conor Dooley
2023-04-27 17:15 ` Heiko Stübner
2023-04-27 18:28 ` Conor Dooley
2023-04-28 7:53 ` Conor Dooley
2023-04-28 10:28 ` Andrew Jones
2023-04-28 14:25 ` Conor Dooley
2023-04-28 14:57 ` [PATCH 0/4] Expose the isa-string via the AT_BASE_PLATFORM aux vector Palmer Dabbelt
2023-04-28 18:48 ` Christoph Müllner
2023-04-28 18:59 ` Philipp Tomsich
2023-04-28 19:28 ` Palmer Dabbelt
2023-04-28 19:52 ` Palmer Dabbelt
2023-04-30 7:32 ` Shengyu Qu
2023-05-01 19:55 ` Björn Töpel
2023-05-01 20:08 ` Jessica Clarke
2023-05-02 5:48 ` Björn Töpel
2023-05-02 7:03 ` Philipp Tomsich
2023-05-02 7:58 ` Björn Töpel [this message]
2023-05-02 9:13 ` Philipp Tomsich
2023-05-02 10:09 ` Björn Töpel
2023-05-02 17:15 ` Palmer Dabbelt
2023-05-03 10:30 ` Heiko Stübner
2023-05-08 16:49 ` Evan Green
[not found] ` <CAAeLtUDgWwT0wxhFANagBX4ExA_HkyqM-ZdPn==+_atGV3vTww@mail.gmail.com>
2023-05-08 17:34 ` Philipp Tomsich
2023-05-08 17:38 ` Jessica Clarke
2023-05-09 17:23 ` Evan Green
2023-05-02 14:55 ` Palmer Dabbelt
[not found] <CABpcLcSTEegLcbWvs7NCvThvnpo8BQ1Gn9kRdEfe_ZobvYG1jg@mail.gmail.com>
2023-04-28 20:23 ` Palmer Dabbelt
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