From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27A35FA373D for ; Tue, 1 Nov 2022 05:06:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229795AbiKAFGg (ORCPT ); Tue, 1 Nov 2022 01:06:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229649AbiKAFGe (ORCPT ); Tue, 1 Nov 2022 01:06:34 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C927C13D3F for ; Mon, 31 Oct 2022 22:06:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667279193; x=1698815193; h=from:to:cc:subject:references:date:in-reply-to: message-id:mime-version; bh=IvSOtGrzZN2pV+uWfoyYt5wv9j9DhXJ+Scyj4+toEww=; b=fZTtjZJ6i7hRSfEE5uqNjR76f4BVCQfTPUM+r9VIxrF9vHumJStihIDO mrYwvKHYB2HBEplUdd4UOcC/XpcKqfCvRgSHnSN0HaaSQOGCnD9wRXB58 uMANcGOJF2LpPmPediC3FylCFqKZ07WXZUsZlyEB3qG1L2VMurNXzF5kw QsC/d/pO50fS9skWLsH0XGKtajhcb9SZbdJM96gFsxnZfn9tL745tMSRL JE9zN0E7GrEi4y5anExd0Zm9uEPFOvD6CbF8rVQ/w9SCpGDxUK5WM9zyc 8HhJgpunJEd8SYbqlB0SO4NHSS67u5SJncJv6Z0kjFMmrOir7ij0sI855 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10517"; a="306683278" X-IronPort-AV: E=Sophos;i="5.95,229,1661842800"; d="scan'208";a="306683278" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2022 22:06:33 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10517"; a="628474616" X-IronPort-AV: E=Sophos;i="5.95,229,1661842800"; d="scan'208";a="628474616" Received: from yhuang6-desk2.sh.intel.com (HELO yhuang6-desk2.ccr.corp.intel.com) ([10.238.208.55]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2022 22:06:31 -0700 From: "Huang, Ying" To: Peter Xu Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, Andrew Morton , Miaohe Lin , David Hildenbrand , HORIGUCHI NAOYA , Andrea Arcangeli Subject: Re: [PATCH 0/2] mm: Use pte marker for swapin errors References: <20221030214151.402274-1-peterx@redhat.com> <87h6zkepog.fsf@yhuang6-desk2.ccr.corp.intel.com> Date: Tue, 01 Nov 2022 13:05:51 +0800 In-Reply-To: (Peter Xu's message of "Mon, 31 Oct 2022 10:14:39 -0400") Message-ID: <87mt9bclhs.fsf@yhuang6-desk2.ccr.corp.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=ascii Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Peter Xu writes: > On Mon, Oct 31, 2022 at 09:40:15AM +0800, Huang, Ying wrote: >> Peter Xu writes: >> >> > rfc->v1: >> > - Rename SWAP_ERROR -> SWAPIN_ERROR [David, Miaohe] >> > - Added r-bs for Ying and Miaohe >> > >> > Hi, >> > >> > This series uses the pte marker to replace the swapin error swap entry, >> > then we save one more swap entry slot for swap devices. A new pte marker >> > bit is defined. >> >> Per my understanding, "swap entry" describes one swap page (4KB on x86) >> in one swap device. So, the original swapin error implementation uses >> one swap file (or swap device) instead of one swap entry. So your patch >> saves one swap file (or swap device). > > Yeah I was definitely not accurate enough, I wanted to use "slot" to mean > "type" here but obviously I didn't make it, sorry. Hopefully the whole > patchset is still clear enough anyway so no reader will get confused by it. The terminology used in swap code is a little complex. The swap slot is used to describe swap entry (swap page) too in swap slots cache (swap_slots.c/h). Best Regards, Huang, Ying