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Fri, 22 Aug 2025 15:13:22 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1755868405; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=/Xt9kUxaqedEzy7mb2YdVsoY32BQaXwaTEeI7OTr1mI=; b=U19nGedyT/NWgRKxA+WD/R29xrHhG9nr2wfXWNXFRyfnhV+d4gf5yMaIoz++E9KbH66fbz Gq83IrRY5ZpSoJkHctNTLoTUzse7acZVa+0y53sGJxW0ywSMbI+HHL5QC+yFZI5OgRvr19 oFIz9UTxepVGWNHzGbRYsfmzVKr2vo92txZAkHxiNgc7gcWEVyfTKYUveLhJHEaYO3Z4wI YbJn4nTCc7iVAa2odeR6jGBFA270hfJdlfnZzfuVFKRdfectOn9QPH3IXywP7QLgsEXgSb 7R2KTV5sU04iw5L47uEkjilULQ1nCvCf/nvUVWmldT1tqpDEJgv/Ei5ZMQKgiQ== From: Gregory CLEMENT To: Krzysztof Kozlowski , Andrew Lunn , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: Re: [PATCH] arm64: dts: marvell: Minor whitespace cleanup In-Reply-To: <20250819131633.86478-2-krzysztof.kozlowski@linaro.org> References: <20250819131633.86478-2-krzysztof.kozlowski@linaro.org> Date: Fri, 22 Aug 2025 15:13:22 +0200 Message-ID: <87plcn5wjx.fsf@BLaptop.bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Krzysztof Kozlowski writes: > The DTS code coding style expects exactly one space around '=3D' > character. > > Signed-off-by: Krzysztof Kozlowski Applied on mvebu/dt64 Thanks, Gregory > --- > arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 2 +- > arch/arm64/boot/dts/marvell/cn9132-clearfog.dts | 4 ++-- > arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi | 2 +- > 3 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/b= oot/dts/marvell/ac5-98dx25xx.dtsi > index 605f5be1538c..4878773883c9 100644 > --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi > +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi > @@ -322,7 +322,7 @@ spi1: spi@805a8000 { >=20=20 > nand: nand-controller@805b0000 { > compatible =3D "marvell,ac5-nand-controller"; > - reg =3D <0x0 0x805b0000 0x0 0x00000054>; > + reg =3D <0x0 0x805b0000 0x0 0x00000054>; > #address-cells =3D <0x1>; > #size-cells =3D <0x0>; > interrupts =3D ; > diff --git a/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts b/arch/arm64= /boot/dts/marvell/cn9132-clearfog.dts > index 0f53745a6fa0..c872c8eca518 100644 > --- a/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts > +++ b/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts > @@ -559,7 +559,7 @@ led@2 { > }; >=20=20 > &cp2_ethernet { > - status =3D "okay"; > + status =3D "okay"; > }; >=20=20 > /* SRDS #2 - 5GE */ > @@ -572,7 +572,7 @@ &cp2_eth0 { > }; >=20=20 > &cp2_gpio1 { > - pinctrl-names=3D "default"; > + pinctrl-names =3D "default"; > pinctrl-0 =3D <&cp2_rsvd9_pins>; >=20=20 > /* J21 */ > diff --git a/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi b/arch/arm64= /boot/dts/marvell/cn9132-sr-cex7.dtsi > index afc041c1c448..1c9996d8cb24 100644 > --- a/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi > +++ b/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi > @@ -442,7 +442,7 @@ tpm@0 { > reg =3D <0>; > compatible =3D "infineon,slb9670", "tcg,tpm_tis-spi"; > spi-max-frequency =3D <10000000>; > - pinctrl-names =3D "default"; > + pinctrl-names =3D "default"; > pinctrl-0 =3D <&cp1_tpm_irq_pins>; > interrupt-parent =3D <&cp1_gpio1>; > interrupts =3D <17 IRQ_TYPE_LEVEL_LOW>; > --=20 > 2.48.1 > --=20 Gr=C3=A9gory CLEMENT, Bootlin Embedded Linux and Kernel engineering https://bootlin.com