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From: "Björn Töpel" <bjorn@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: "Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org,
	"Björn Töpel" <bjorn@rivosinc.com>,
	"Andreas Schwab" <schwab@linux-m68k.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] riscv: Add instruction dump to RISC-V splats
Date: Wed, 18 Jan 2023 12:08:56 +0100	[thread overview]
Message-ID: <87pmbcnlpz.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <CAMuHMdXi7yEiS73YhQAQKqj+3rTCNmuRrdnNKS4prvG96Xgqog@mail.gmail.com>

Geert Uytterhoeven <geert@linux-m68k.org> writes:

>> +static void dump_kernel_instr(const char *loglvl, struct pt_regs *regs)
>> +{
>> +       char str[sizeof("0000 ") * 12 + 2 + 1], *p = str;
>> +       unsigned long addr = regs->epc;
>
> Given you never use this as an unsigned long, what about
>
>     const u16 *insns = (u16 *)instruction_pointer(regs);
>
> so you no longer need casts below?

Indeed! Good suggestion, thank you! I'll do this change in v3.

>> +       long bad;
>> +       u16 val;
>> +       int i;
>> +
>> +       for (i = -10; i < 2; i++) {
>> +               bad = get_kernel_nofault(val, &((u16 *)addr)[i]);
>> +               if (!bad) {
>> +                       p += sprintf(p, i == 0 ? "(%04hx) " : "%04hx ", val);
>> +               } else {
>> +                       printk("%sCode: Unable to access instruction at 0x%lx.\n",
>
> %px, so you can drop the cast to long below.

Much cleaner. Thanks!


Björn

  reply	other threads:[~2023-01-18 11:49 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-16  7:38 [PATCH v2 0/2] riscv: Dump faulting instructions in oops handler Björn Töpel
2023-01-16  7:38 ` [PATCH v2 1/2] riscv: Add instruction dump to RISC-V splats Björn Töpel
2023-01-18 10:48   ` Geert Uytterhoeven
2023-01-18 11:08     ` Björn Töpel [this message]
2023-01-16  7:38 ` [PATCH v2 2/2] scripts/decodecode: Add support for RISC-V Björn Töpel

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