From: Thomas Gleixner <tglx@kernel.org>
To: "Gregory CLEMENT" <gregory.clement@bootlin.com>,
"Vladimir Kondratiev" <vladimir.kondratiev@mobileye.com>,
"Benoît Monin" <benoit.monin@bootlin.com>,
"Théo Lebrun" <theo.lebrun@bootlin.com>,
"Radu Rendec" <radu@rendec.net>, "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
Gregory CLEMENT <gregory.clement@bootlin.com>
Subject: Re: [PATCH v3 2/4] irqchip: irq-eyeq5-msi: add EyeQ5 PCIe MSI controller driver
Date: Mon, 09 Nov 2026 11:01:35 +0100 [thread overview]
Message-ID: <87se1auxvk.ffs@fw13> (raw)
In-Reply-To: <20261104-eyeq5_msi-v3-2-2866f732cd38@bootlin.com>
On Wed, Nov 04 2026 at 13:58, Gregory CLEMENT wrote:
> +
> + i = 0;
> + for_each_set_bit(bit, reserved, EYEQ_MSI_MAX_VECTORS) {
> + irq_domain_set_info(domain, virq + i++, bit, &eyeq_msi_irq_chip,
> + msi, handle_edge_irq, NULL, NULL);
Ok. So you addressed that part, but the rest of the comments I made on
V2 still apply. This patch also requires a review ideally from Vladimir
next prev parent reply other threads:[~2026-11-09 10:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 12:58 [PATCH v3 0/4] irqchip: add EyeQ5 PCIe MSI controller Gregory CLEMENT
2026-11-04 12:58 ` [PATCH v3 1/4] dt-bindings: interrupt-controller: add Mobileye " Gregory CLEMENT
2026-11-04 12:58 ` [PATCH v3 2/4] irqchip: irq-eyeq5-msi: add EyeQ5 PCIe MSI controller driver Gregory CLEMENT
2026-11-09 10:01 ` Thomas Gleixner [this message]
2026-11-04 12:58 ` [PATCH v3 3/4] MIPS: dts: eyeq5: add MSI controllers Gregory CLEMENT
2026-11-04 12:58 ` [PATCH v3 4/4] MAINTAINERS: add EyeQ5 MSI controller entry Gregory CLEMENT
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