mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "Björn Töpel" <bjorn@kernel.org>
To: Chen Guokai <chenguokai17@mails.ucas.ac.cn>,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, rostedt@goodmis.org, mingo@redhat.com,
	sfr@canb.auug.org.au
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	liaochang1@huawei.com,
	Chen Guokai <chenguokai17@mails.ucas.ac.cn>
Subject: Re: [PATCH v5 4/9] riscv/kprobe: Add common RVI and RVC instruction decoder code
Date: Mon, 02 Jan 2023 19:03:46 +0100	[thread overview]
Message-ID: <87tu18vmnx.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <20221224114315.850130-5-chenguokai17@mails.ucas.ac.cn>

Chen Guokai <chenguokai17@mails.ucas.ac.cn> writes:

> From: Liao Chang <liaochang1@huawei.com>

> diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h
> index cb6ff7dccb92..74d8c1ba9064 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.h
> +++ b/arch/riscv/kernel/probes/simulate-insn.h
> @@ -37,6 +37,40 @@ __RISCV_INSN_FUNCS(c_jalr,	0xf007, 0x9002);
>  __RISCV_INSN_FUNCS(c_beqz,	0xe003, 0xc001);
>  __RISCV_INSN_FUNCS(c_bnez,	0xe003, 0xe001);
>  __RISCV_INSN_FUNCS(c_ebreak,	0xffff, 0x9002);
> +/* RVC(S) instructions contain rs1 and rs2 */
> +__RISCV_INSN_FUNCS(c_sq,	0xe003, 0xa000);
> +__RISCV_INSN_FUNCS(c_sw,	0xe003, 0xc000);
> +__RISCV_INSN_FUNCS(c_sd,	0xe003, 0xe000);
> +/* RVC(A) instructions contain rs1 and rs2 */
> +__RISCV_INSN_FUNCS(c_sub,	0xfc03, 0x8c01);

Incorrect mask.

> +__RISCV_INSN_FUNCS(c_subw,	0xfc43, 0x9c01);
> +/* RVC(L) instructions contain rs1 */
> +__RISCV_INSN_FUNCS(c_lq,	0xe003, 0x2000);
> +__RISCV_INSN_FUNCS(c_lw,	0xe003, 0x4000);
> +__RISCV_INSN_FUNCS(c_ld,	0xe003, 0x6000);
> +/* RVC(I) instructions contain rs1 */
> +__RISCV_INSN_FUNCS(c_addi,	0xe003, 0x0001);
> +__RISCV_INSN_FUNCS(c_addiw,	0xe003, 0x2001);
> +__RISCV_INSN_FUNCS(c_addi16sp,	0xe183, 0x6101);
> +__RISCV_INSN_FUNCS(c_slli,	0xe003, 0x0002);
> +/* RVC(B) instructions contain rs1 */
> +__RISCV_INSN_FUNCS(c_sri,	0xe803, 0x8001);
> +__RISCV_INSN_FUNCS(c_andi,	0xec03, 0x8801);
> +/* RVC(SS) instructions contain rs2 */
> +__RISCV_INSN_FUNCS(c_sqsp,	0xe003, 0xa002);
> +__RISCV_INSN_FUNCS(c_swsp,	0xe003, 0xc002);
> +__RISCV_INSN_FUNCS(c_sdsp,	0xe003, 0xe002);
> +/* RVC(R) instructions contain rs2 and rd */
> +__RISCV_INSN_FUNCS(c_mv,	0xe003, 0x8002);

Shouldn't the mask be 0xf003?


Björn

  reply	other threads:[~2023-01-02 18:04 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-24 11:43 [PATCH v5 0/9] Add OPTPROBES feature on RISCV Chen Guokai
2022-12-24 11:43 ` [PATCH v5 1/9] riscv/kprobe: Prepare the skeleton to implement RISCV OPTPROBES feature Chen Guokai
2023-01-02 18:03   ` Björn Töpel
2023-01-04  8:34     ` liaochang (A)
2022-12-24 11:43 ` [PATCH v5 2/9] riscv/kprobe: Allocate detour buffer from module area Chen Guokai
2022-12-24 11:43 ` [PATCH v5 3/9] riscv/kprobe: Prepare the skeleton to prepare optimized kprobe Chen Guokai
2023-01-02 18:03   ` Björn Töpel
2023-01-04  8:34     ` liaochang (A)
2023-01-04  8:54       ` Björn Töpel
2023-01-03  8:27   ` Björn Töpel
2023-01-04  8:34     ` liaochang (A)
2022-12-24 11:43 ` [PATCH v5 4/9] riscv/kprobe: Add common RVI and RVC instruction decoder code Chen Guokai
2023-01-02 18:03   ` Björn Töpel [this message]
2023-01-04  8:35     ` liaochang (A)
2023-01-04  8:57       ` Björn Töpel
2022-12-24 11:43 ` [PATCH v5 5/9] riscv/kprobe: Search free register(s) to clobber for 'AUIPC/JALR' Chen Guokai
2022-12-24 11:43 ` [PATCH v5 6/9] riscv/kprobe: Add code to check if kprobe can be optimized Chen Guokai
2023-01-02 18:04   ` Björn Töpel
2023-01-04  8:35     ` liaochang (A)
2022-12-24 11:43 ` [PATCH v5 7/9] riscv/kprobe: Prepare detour buffer for optimized kprobe Chen Guokai
2023-01-02 18:04   ` Björn Töpel
2023-01-04  8:35     ` liaochang (A)
2023-01-04  9:12       ` Björn Töpel
2023-01-05  0:46         ` liaochang (A)
2022-12-24 11:43 ` [PATCH v5 8/9] riscv/kprobe: Patch AUIPC/JALR pair to optimize kprobe Chen Guokai
2022-12-24 11:43 ` [PATCH v5 9/9] riscv/kprobe: Search free registers from unused caller-saved ones Chen Guokai
2023-01-02 18:04   ` Björn Töpel
2023-01-04  8:35     ` liaochang (A)
2023-01-02 18:02 ` [PATCH v5 0/9] Add OPTPROBES feature on RISCV Björn Töpel
2023-01-04  8:30   ` Xim
2023-01-04  8:45     ` Björn Töpel
2023-01-04  8:34   ` liaochang (A)
2023-01-04  8:53     ` Björn Töpel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87tu18vmnx.fsf@all.your.base.are.belong.to.us \
    --to=bjorn@kernel.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=chenguokai17@mails.ucas.ac.cn \
    --cc=liaochang1@huawei.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mingo@redhat.com \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=rostedt@goodmis.org \
    --cc=sfr@canb.auug.org.au \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®