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From: Marc Zyngier <marc.zyngier@arm.com>
To: Feng Kan <fkan@apm.com>
Cc: "tglx\@linutronix.de" <tglx@linutronix.de>,
        Catalin Marinas <Catalin.Marinas@arm.com>,
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Subject: Re: [PATCH 2/2] irqchip: gic: preserve gic V2 bypass bits in cpu ctrl register
In-Reply-To: <CAL85gmByuxTdPWaDZENDz=rKQtfZc44eUaCsnK04DfeXknAoYg@mail.gmail.com>
	(Feng Kan's message of "Tue, 20 May 2014 02:26:33 +0100")
Organization: ARM Ltd
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Date: Tue, 20 May 2014 10:14:05 +0100
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On Tue, May 20 2014 at  2:26:33 am BST, Feng Kan <fkan@apm.com> wrote:
>>>  #ifdef CONFIG_CPU_PM
>>> @@ -613,7 +636,7 @@ static void gic_cpu_restore(unsigned int gic_nr)
>>>                                       dist_base + GIC_DIST_PRI + i * 4);
>>>
>>>       writel_relaxed(GIC_INT_PRI_THRESHOLD, cpu_base + GIC_CPU_PRIMASK);
>>> -     writel_relaxed(GIC_CPU_ENABLE, cpu_base + GIC_CPU_CTRL);
>>> +     gic_cpu_if_up();
>>
>> Have you tested the save/restore path? It seems that we dont save
>> GICC_CTLR, so it may not do what you think it will...
>
> We are debating which is the better method. Currently we are only
> disabling the GIC distributor so it is not a problem. Later on, with
> more aggressive PM we could have the helper core to setup the GIC CTLR
> prior to releasing out of the PM state. However, it seems it would be
> more cleaner if we save off the GIC_CTLR bits in the
> gic_cpu_save. This would add additional items in to the
> gic_chip_data. Would you be open to that?

I'm open to anything that looks reasonable and doesn't introduce
regressions. Saving/restoring the CPU interface state should be fine.

	M.
-- 
Jazz is not dead. It just smells funny.