From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755651AbdKNTo6 (ORCPT ); Tue, 14 Nov 2017 14:44:58 -0500 Received: from anholt.net ([50.246.234.109]:44950 "EHLO anholt.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755066AbdKNTon (ORCPT ); Tue, 14 Nov 2017 14:44:43 -0500 From: Eric Anholt To: Stefan Schake Cc: dri-devel@lists.freedesktop.org, linux-rpi-kernel@lists.infradead.org, David Airlie , linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] drm/vc4: Ensure interrupts are disabled In-Reply-To: References: <1510275907-993-1-git-send-email-stschake@gmail.com> <1510275907-993-3-git-send-email-stschake@gmail.com> <87y3n9af2e.fsf@anholt.net> User-Agent: Notmuch/0.22.2+1~gb0bcfaa (http://notmuchmail.org) Emacs/25.2.2 (x86_64-pc-linux-gnu) Date: Tue, 14 Nov 2017 11:44:41 -0800 Message-ID: <87zi7o8x1y.fsf@anholt.net> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha512; protocol="application/pgp-signature" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-=-= Content-Type: text/plain Stefan Schake writes: > On Tue, Nov 14, 2017 at 1:18 AM, Eric Anholt wrote: >> Stefan Schake writes: >> >>> The overflow mem work callback vc4_overflow_mem_work reenables its >>> associated interrupt upon completion. To ensure all interrupts are disabled >>> when we return from vc4_irq_uninstall, we need to disable it again if >>> cancel_work_sync indicated pending work. >> >> Is there a reason we need the interrupts disabled at the V3D level while >> we have the IRQ disabled at the irqchip level? Once we re-enable at the >> irqchip, we immediately V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS) anyway. > > irqchip will mask it in the ARM interrupt controller, so we will certainly never > see an interrupt. I'm not sure on the exact guarantees V3D_INTENA and > V3D_INTCTL make - does the state in INTENA affect if V3D will signal an > interrupt in INTCTL? We're not currently clearing the latter in postinstall. INTENA/INTDIS writes update the state of the single register that controls which bits of INTCTL get ORed together to raise the interrupt outside the V3D block. --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAloLR6kACgkQtdYpNtH8 nuh7/w//bnfBKzseqAN7pfRFdncVSgEg/1K3QBsab7u+kgbs8LU9H5aiUpp8mTOv W9OCCXe27RN6wHPzDN1bxTIDmkv30LKjpHJJ2enFJmhMK9bz7aUiyUJYdy/qe0DQ 6EU0vUif08yfbvU866vh8RzwMvLf3isvnme+kfYod/34MqSFc3u6ccBV2lICTMlr sylZH9lwddizNS0yVojBGxINRLINGNnuPstfFkSKhMfwkFR0qey/nEOAaVBHNEU9 uvU/Ow4ZpCfAIq5ug1SlQK3DO1RPOMCiRNQhkENfL18pjQ4joaBe+h1ik7/dYmJM IMo05QzV0Dn3WI5rNzryXZzmEjkcwSP5dmtv+c4lQG3DG3CaTfwGPRCfmt4iWd2r 5iyeIvGlZEehUBaOAQp5tLA1pP0ZXuef9q+5n7ghIYzfX4XldRv+E/m5qTh2/gte HeglVb+aPhwzJsYwqK6ioO/gnhbAhydfoyuUIsRYGwrn2BW1ovpZ9LQRSGCcVEHh LGbhDTgJ8mLqpxHYuO/S/dU6m00zNAu/EhDsm1QOSDz+5xTtkhiRI3sh14GkuiAH hdt9iRSYT9wA8NAFl10ZwVyPbcnHa62Dc30QMVgJK6AtArHy0WC7NJ44B980R7Sn p74uYtWWHH9mVswRVEht0O9hLRuyjU2egA4p4ZfEfPWuPkgcHoU= =4aYG -----END PGP SIGNATURE----- --=-=-=--