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b=j+dxlps+gqW75WVPPsqWlJvqwvDuXfQft+a69WvTgKMfG1ztI7NAwby5qicDw6C1+PSBxw anus9AjfqKrhz+CeM1ftngoAyn6nIG/2al8nXPvRgFxxZoDZRJQ9dz2n49mku6rDE6IsPV EQiJgGU6FXMYxuoUupl7koWKIUCmuDGPCEFuFUgutgoFLDUXrcpwohxK9/JTytFS/8AWqO bcBc/nmibBonzP9JG+TOhkRmLQFUxfEee0VnXIjfv57q+3semoTOuB6gZcfPqmdruAGMrP z0y6cFdUQCLmm8C28TzINWZdhEGMCEctyUnaBMFooxCKHWz/xXXmB4YZDXq3vg== Message-Id: <88b20a43-46c7-4297-ac20-dea7b0157c92@lanxincomputing.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250618113532.471448-1-apatel@ventanamicro.com> <20250618113532.471448-8-apatel@ventanamicro.com> Content-Type: text/plain; charset=UTF-8 Cc: "Palmer Dabbelt" , "Paul Walmsley" , "Alexandre Ghiti" , "Andrew Jones" , "Anup Patel" , , , , , "Atish Patra" From: "Nutty Liu" Content-Transfer-Encoding: 7bit In-Reply-To: <20250618113532.471448-8-apatel@ventanamicro.com> X-Original-From: Nutty Liu Received: from [127.0.0.1] ([139.226.59.215]) by smtp.feishu.cn with ESMTPS; Wed, 25 Jun 2025 15:39:50 +0800 X-Lms-Return-Path: Subject: Re: [PATCH v3 07/12] RISC-V: KVM: Use ncsr_xyz() in kvm_riscv_vcpu_trap_redirect() To: "Anup Patel" , "Atish Patra" Date: Wed, 25 Jun 2025 15:39:48 +0800 User-Agent: Mozilla Thunderbird Content-Language: en-US On 6/18/2025 7:35 PM, Anup Patel wrote: > The H-extension CSRs accessed by kvm_riscv_vcpu_trap_redirect() will > trap when KVM RISC-V is running as Guest/VM hence remove these traps > by using ncsr_xyz() instead of csr_xyz(). > > Reviewed-by: Atish Patra > Signed-off-by: Anup Patel > --- > arch/riscv/kvm/vcpu_exit.c | 13 +++++++------ > 1 file changed, 7 insertions(+), 6 deletions(-) > > diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c > index 6e0c18412795..85c43c83e3b9 100644 > --- a/arch/riscv/kvm/vcpu_exit.c > +++ b/arch/riscv/kvm/vcpu_exit.c > @@ -9,6 +9,7 @@ > #include > #include > #include > +#include > > static int gstage_page_fault(struct kvm_vcpu *vcpu, struct kvm_run *run, > struct kvm_cpu_trap *trap) > @@ -135,7 +136,7 @@ unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu, > void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, > struct kvm_cpu_trap *trap) > { > - unsigned long vsstatus = csr_read(CSR_VSSTATUS); > + unsigned long vsstatus = ncsr_read(CSR_VSSTATUS); > > /* Change Guest SSTATUS.SPP bit */ > vsstatus &= ~SR_SPP; > @@ -151,15 +152,15 @@ void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, > vsstatus &= ~SR_SIE; > > /* Update Guest SSTATUS */ > - csr_write(CSR_VSSTATUS, vsstatus); > + ncsr_write(CSR_VSSTATUS, vsstatus); > > /* Update Guest SCAUSE, STVAL, and SEPC */ > - csr_write(CSR_VSCAUSE, trap->scause); > - csr_write(CSR_VSTVAL, trap->stval); > - csr_write(CSR_VSEPC, trap->sepc); > + ncsr_write(CSR_VSCAUSE, trap->scause); > + ncsr_write(CSR_VSTVAL, trap->stval); > + ncsr_write(CSR_VSEPC, trap->sepc); > > /* Set Guest PC to Guest exception vector */ > - vcpu->arch.guest_context.sepc = csr_read(CSR_VSTVEC); > + vcpu->arch.guest_context.sepc = ncsr_read(CSR_VSTVEC); > > /* Set Guest privilege mode to supervisor */ > vcpu->arch.guest_context.sstatus |= SR_SPP; Reviewed-by: Nutty Liu Thanks, Nutty