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([2a05:6e02:1041:c10:37e6:ed62:3c8b:2621]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3e7607870cfsm25993034f8f.19.2025.09.17.02.02.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Sep 2025 02:02:46 -0700 (PDT) Message-ID: <8917db78-fe40-487a-9ad5-f1bddfe0120c@linaro.org> Date: Wed, 17 Sep 2025 11:02:45 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/2] clocksource/drivers/sh_cmt: Improve clock event design To: =?UTF-8?Q?Niklas_S=C3=B6derlund?= , Thomas Gleixner , Geert Uytterhoeven , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org References: <20250910142657.1148696-1-niklas.soderlund+renesas@ragnatech.se> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <20250910142657.1148696-1-niklas.soderlund+renesas@ragnatech.se> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 10/09/2025 16:26, Niklas Söderlund wrote: > Hello, > > This series tries to address an issue with the Renesas CMT driver > design. The driver do PM and clock handling in struct clock_event_device > callbacks. This leads to LOCKDEP warnings and I think hints at a larger > issue. > > ============================= > [ BUG: Invalid wait context ] > 6.17.0-rc3-arm64-renesas-03071-gb3c4f4122b28-dirty #21 Not tainted > ----------------------------- > swapper/1/0 is trying to lock: > ffff00000898d180 (&dev->power.lock){-...}-{3:3}, at: __pm_runtime_resume+0x38/0x88 > ccree e6601000.crypto: ARM CryptoCell 630P Driver: HW version 0xAF400001/0xDCC63000, Driver version 5.0 > other info that might help us debug this: > ccree e6601000.crypto: ARM ccree device initialized > context-{5:5} > 2 locks held by swapper/1/0: > #0: ffff80008173c298 (tick_broadcast_lock){-...}-{2:2}, at: __tick_broadcast_oneshot_control+0xa4/0x3a8 > #1: ffff0000089a5858 (&ch->lock){....}-{2:2} > usbcore: registered new interface driver usbhid > , at: sh_cmt_start+0x30/0x364 > stack backtrace: > CPU: 1 UID: 0 PID: 0 Comm: swapper/1 Not tainted 6.17.0-rc3-arm64-renesas-03071-gb3c4f4122b28-dirty #21 PREEMPT > Hardware name: Renesas Salvator-X 2nd version board based on r8a77965 (DT) > Call trace: > show_stack+0x14/0x1c (C) > dump_stack_lvl+0x6c/0x90 > dump_stack+0x14/0x1c > __lock_acquire+0x904/0x1584 > lock_acquire+0x220/0x34c > _raw_spin_lock_irqsave+0x58/0x80 > __pm_runtime_resume+0x38/0x88 > sh_cmt_start+0x54/0x364 > sh_cmt_clock_event_set_oneshot+0x64/0xb8 > clockevents_switch_state+0xfc/0x13c > tick_broadcast_set_event+0x30/0xa4 > __tick_broadcast_oneshot_control+0x1e0/0x3a8 > tick_broadcast_oneshot_control+0x30/0x40 > cpuidle_enter_state+0x40c/0x680 > cpuidle_enter+0x30/0x40 > do_idle+0x1f4/0x26c > cpu_startup_entry+0x34/0x40 > secondary_start_kernel+0x11c/0x13c > __secondary_switched+0x74/0x78 > > This series tries to address this by instead doing PM and clock > management at probe time, and leaving them on for the CMT channels that > are used as clock events. The CMT design is a bit messy as channels can > be used both as clock sources and events. And the design to do the > housekeeping for clock sources seems to be valid and is kept. > > The work is tested on R-Car M3-N and R-Mobile A1. > > See individual patches for change long. Applied, thanks -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog