From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@oss.qualcomm.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Abraham I" <kishon@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: [PATCH 2/3] dt-bindings: PCI: qcom: Enforce check for PHY, PERST# and WAKE# properties
Date: Fri, 10 Oct 2025 20:28:53 +0200 [thread overview]
Message-ID: <896b58cd-9a13-4b7e-bf62-e062728d3e53@oss.qualcomm.com> (raw)
In-Reply-To: <20251010-pci-binding-v1-2-947c004b5699@oss.qualcomm.com>
On 10/10/25 8:25 PM, Manivannan Sadhasivam wrote:
> Currently, the binding supports specifying the PHY, PERST#, WAKE#
> properties in two ways:
>
> 1. Controller node (deprecated)
> - phys
> - perst-gpios
> - wake-gpios
>
> 2. Root Port node
> - phys
> - reset-gpios
> - wake-gpios
>
> But there is no check to make sure that the both variants are not mixed.
> For instance, if the Controller node specifies 'phys', 'reset-gpios',
> 'wake-gpios' or if the Root Port node specifies 'phys', 'perst-gpios',
> 'wake-gpios', then the driver will fail as reported. Hence, enforce the
> check in the binding to catch these issues.
>
> It is also possible that DTs could have 'phys' property in Controller node
> and 'reset-gpios/wake-gpios' properties in the Root Port node. It will also
> be a problem, but it is not possible to catch these cross-node issues in
> the binding.
>
> Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Closes: https://lore.kernel.org/linux-pci/8f2e0631-6c59-4298-b36e-060708970ced@oss.qualcomm.com
> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> ---
I would also like to add
Reported-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Since he originally made me aware of this issue
Konrad
next prev parent reply other threads:[~2025-10-10 18:29 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-10 18:25 [PATCH 0/3] PCI: qcom: Binding fix Manivannan Sadhasivam
2025-10-10 18:25 ` [PATCH 1/3] dt-bindings: PCI: Update the email address for Manivannan Sadhasivam Manivannan Sadhasivam
2025-10-15 12:43 ` Rob Herring (Arm)
2025-10-10 18:25 ` [PATCH 2/3] dt-bindings: PCI: qcom: Enforce check for PHY, PERST# and WAKE# properties Manivannan Sadhasivam
2025-10-10 18:28 ` Konrad Dybcio [this message]
2025-10-10 19:33 ` Rob Herring (Arm)
2025-10-11 4:10 ` Manivannan Sadhasivam
2025-10-10 18:25 ` [PATCH 3/3] PCI: qcom: Treat PHY and PERST# as optional for the new binding Manivannan Sadhasivam
2025-10-10 18:32 ` Konrad Dybcio
2025-10-11 4:09 ` Manivannan Sadhasivam
2025-10-13 9:43 ` Bartosz Golaszewski
2025-10-13 14:40 ` Krishna Chaitanya Chundru
2025-10-26 15:57 ` (subset) [PATCH 0/3] PCI: qcom: Binding fix Manivannan Sadhasivam
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